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RTXI 1.3
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RTXI 1.3
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00001 // !!!!!!!!!!!!!!!!!!!!!!!!!!!!! 00002 // This file is autogenerated!!! 00003 // !!!!!!!!!!!!!!!!!!!!!!!!!!!!! 00004 00005 #ifndef ___tTIO_h___ 00006 #define ___tTIO_h___ 00007 00008 // includes 00009 #ifndef ___nimdbg_tStatus2_h___ 00010 #include "tStatus2.h" 00011 #endif 00012 00013 #include "osiBus.h" 00014 00015 class tTIO 00016 { 00017 public: 00018 //--------------------------------------------------------------------------- 00019 // IO Strategies 00020 //--------------------------------------------------------------------------- 00021 class tReg16IODirect32 00022 { 00023 public: 00024 inline void write( 00025 tBusSpaceReference addrSpace, 00026 u32 offset, 00027 u16 value, 00028 nMDBG::tStatus2* statusChain = NULL); 00029 00030 inline u16 read( 00031 tBusSpaceReference addrSpace, 00032 u32 offset, 00033 nMDBG::tStatus2* statusChain = NULL); 00034 }; 00035 00036 class tReg32IODirect32 00037 { 00038 public: 00039 inline void write( 00040 tBusSpaceReference addrSpace, 00041 u32 offset, 00042 u32 value, 00043 nMDBG::tStatus2* statusChain = NULL); 00044 00045 inline u32 read( 00046 tBusSpaceReference addrSpace, 00047 u32 offset, 00048 nMDBG::tStatus2* statusChain = NULL); 00049 }; 00050 00051 //--------------------------------------------------------------------------- 00052 // G0_AutoIncrement 00053 //--------------------------------------------------------------------------- 00054 class tG0_AutoIncrement : public tReg16IODirect32 00055 { 00056 public: 00057 typedef tReg16IODirect32 tIOStrategy; 00058 typedef tTIO tRegisterMap; 00059 00060 enum { 00061 kOffset = 0x88, 00062 kId = 0 00063 }; 00064 tG0_AutoIncrement(); 00065 00066 00067 typedef enum { 00068 kRegisterId = 0, 00069 kDefaultId = 1 00070 } tId; 00071 00072 inline tTIO* registerMap(void); 00073 00074 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00075 00076 // Register Accessors (Compile-time selectable) 00077 inline tG0_AutoIncrement& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00078 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00079 00080 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00081 00082 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00083 00084 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00085 00086 // Field Accessors (Compile-time selectable) 00087 inline tG0_AutoIncrement& set(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00088 inline u16 get(nMDBG::tStatus2* statusChain = NULL) const; 00089 00090 inline void write(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00091 00092 inline u16 read(nMDBG::tStatus2* statusChain = NULL); 00093 00094 // Run-time selectable Register/Field Accessors 00095 private: 00096 u16 _softCopy; 00097 00098 inline void setRegisterMap(tTIO* pTIO); 00099 tTIO* _TIO; 00100 00101 friend class tTIO; 00102 00103 }; 00104 00105 //--------------------------------------------------------------------------- 00106 // G0_Command 00107 //--------------------------------------------------------------------------- 00108 class tG0_Command : public tReg16IODirect32 00109 { 00110 public: 00111 typedef tReg16IODirect32 tIOStrategy; 00112 typedef tTIO tRegisterMap; 00113 00114 enum { 00115 kOffset = 0xc, 00116 kId = 1 00117 }; 00118 tG0_Command(); 00119 00120 00121 typedef enum { 00122 kRegisterId = 0, 00123 kG0_ArmId = 1, 00124 kG0_Save_TraceId = 2, 00125 kG0_LoadId = 3, 00126 kG0_DisarmId = 5, 00127 kG0_Up_DownId = 6, 00128 kG0_Write_SwitchId = 7, 00129 kG0_Synchronized_GateId = 8, 00130 kG0_Little_Big_EndianId = 9, 00131 kG0_Bank_Switch_StartId = 10, 00132 kG0_Bank_Switch_ModeId = 11, 00133 kG0_Bank_Switch_EnableId = 12, 00134 kG1_Arm_CopyId = 13, 00135 kG1_Save_Trace_CopyId = 14, 00136 kG1_Disarm_CopyId = 15 00137 } tId; 00138 00139 inline tTIO* registerMap(void); 00140 00141 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00142 00143 // Register Accessors (Compile-time selectable) 00144 inline tG0_Command& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00145 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00146 00147 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00148 00149 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00150 00151 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00152 00153 // Field Accessors (Compile-time selectable) 00154 inline tG0_Command& setG0_Arm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00155 inline u16 getG0_Arm(nMDBG::tStatus2* statusChain = NULL) const; 00156 00157 inline void writeG0_Arm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00158 00159 inline u16 readG0_Arm(nMDBG::tStatus2* statusChain = NULL); 00160 00161 inline tG0_Command& setG0_Save_Trace(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00162 inline u16 getG0_Save_Trace(nMDBG::tStatus2* statusChain = NULL) const; 00163 00164 inline void writeG0_Save_Trace(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00165 00166 inline u16 readG0_Save_Trace(nMDBG::tStatus2* statusChain = NULL); 00167 00168 inline tG0_Command& setG0_Load(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00169 inline u16 getG0_Load(nMDBG::tStatus2* statusChain = NULL) const; 00170 00171 inline void writeG0_Load(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00172 00173 inline u16 readG0_Load(nMDBG::tStatus2* statusChain = NULL); 00174 00175 inline tG0_Command& setG0_Disarm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00176 inline u16 getG0_Disarm(nMDBG::tStatus2* statusChain = NULL) const; 00177 00178 inline void writeG0_Disarm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00179 00180 inline u16 readG0_Disarm(nMDBG::tStatus2* statusChain = NULL); 00181 00182 typedef enum { 00183 kG0_Up_DownSoftware_Down = 0, 00184 kG0_Up_DownSoftware_Up = 1, 00185 kG0_Up_DownHardware = 2, 00186 kG0_Up_DownHardware_Gate = 3, 00187 } tG0_Up_Down; 00188 inline tG0_Command& setG0_Up_Down(tG0_Up_Down fieldValue, nMDBG::tStatus2* statusChain = NULL); 00189 inline tG0_Up_Down getG0_Up_Down(nMDBG::tStatus2* statusChain = NULL) const; 00190 00191 inline void writeG0_Up_Down(tG0_Up_Down fieldValue, nMDBG::tStatus2* statusChain = NULL); 00192 00193 inline tG0_Up_Down readG0_Up_Down(nMDBG::tStatus2* statusChain = NULL); 00194 00195 typedef enum { 00196 kG0_Write_SwitchAlways_Load_A = 0, 00197 kG0_Write_SwitchInactive_Load = 1, 00198 } tG0_Write_Switch; 00199 inline tG0_Command& setG0_Write_Switch(tG0_Write_Switch fieldValue, nMDBG::tStatus2* statusChain = NULL); 00200 inline tG0_Write_Switch getG0_Write_Switch(nMDBG::tStatus2* statusChain = NULL) const; 00201 00202 inline void writeG0_Write_Switch(tG0_Write_Switch fieldValue, nMDBG::tStatus2* statusChain = NULL); 00203 00204 inline tG0_Write_Switch readG0_Write_Switch(nMDBG::tStatus2* statusChain = NULL); 00205 00206 typedef enum { 00207 kG0_Synchronized_GateDisabled = 0, 00208 kG0_Synchronized_GateEnabled = 1, 00209 } tG0_Synchronized_Gate; 00210 inline tG0_Command& setG0_Synchronized_Gate(tG0_Synchronized_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00211 inline tG0_Synchronized_Gate getG0_Synchronized_Gate(nMDBG::tStatus2* statusChain = NULL) const; 00212 00213 inline void writeG0_Synchronized_Gate(tG0_Synchronized_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00214 00215 inline tG0_Synchronized_Gate readG0_Synchronized_Gate(nMDBG::tStatus2* statusChain = NULL); 00216 00217 typedef enum { 00218 kG0_Little_Big_EndianLow_Register = 0, 00219 kG0_Little_Big_EndianHigh_Register = 1, 00220 } tG0_Little_Big_Endian; 00221 inline tG0_Command& setG0_Little_Big_Endian(tG0_Little_Big_Endian fieldValue, nMDBG::tStatus2* statusChain = NULL); 00222 inline tG0_Little_Big_Endian getG0_Little_Big_Endian(nMDBG::tStatus2* statusChain = NULL) const; 00223 00224 inline void writeG0_Little_Big_Endian(tG0_Little_Big_Endian fieldValue, nMDBG::tStatus2* statusChain = NULL); 00225 00226 inline tG0_Little_Big_Endian readG0_Little_Big_Endian(nMDBG::tStatus2* statusChain = NULL); 00227 00228 inline tG0_Command& setG0_Bank_Switch_Start(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00229 inline u16 getG0_Bank_Switch_Start(nMDBG::tStatus2* statusChain = NULL) const; 00230 00231 inline void writeG0_Bank_Switch_Start(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00232 00233 inline u16 readG0_Bank_Switch_Start(nMDBG::tStatus2* statusChain = NULL); 00234 00235 typedef enum { 00236 kG0_Bank_Switch_ModeGate = 0, 00237 kG0_Bank_Switch_ModeSoftware = 1, 00238 } tG0_Bank_Switch_Mode; 00239 inline tG0_Command& setG0_Bank_Switch_Mode(tG0_Bank_Switch_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00240 inline tG0_Bank_Switch_Mode getG0_Bank_Switch_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00241 00242 inline void writeG0_Bank_Switch_Mode(tG0_Bank_Switch_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00243 00244 inline tG0_Bank_Switch_Mode readG0_Bank_Switch_Mode(nMDBG::tStatus2* statusChain = NULL); 00245 00246 typedef enum { 00247 kG0_Bank_Switch_EnableBank_X = 0, 00248 kG0_Bank_Switch_EnableBank_Y = 1, 00249 } tG0_Bank_Switch_Enable; 00250 inline tG0_Command& setG0_Bank_Switch_Enable(tG0_Bank_Switch_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 00251 inline tG0_Bank_Switch_Enable getG0_Bank_Switch_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00252 00253 inline void writeG0_Bank_Switch_Enable(tG0_Bank_Switch_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 00254 00255 inline tG0_Bank_Switch_Enable readG0_Bank_Switch_Enable(nMDBG::tStatus2* statusChain = NULL); 00256 00257 inline tG0_Command& setG1_Arm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00258 inline u16 getG1_Arm_Copy(nMDBG::tStatus2* statusChain = NULL) const; 00259 00260 inline void writeG1_Arm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00261 00262 inline u16 readG1_Arm_Copy(nMDBG::tStatus2* statusChain = NULL); 00263 00264 inline tG0_Command& setG1_Save_Trace_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00265 inline u16 getG1_Save_Trace_Copy(nMDBG::tStatus2* statusChain = NULL) const; 00266 00267 inline void writeG1_Save_Trace_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00268 00269 inline u16 readG1_Save_Trace_Copy(nMDBG::tStatus2* statusChain = NULL); 00270 00271 inline tG0_Command& setG1_Disarm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00272 inline u16 getG1_Disarm_Copy(nMDBG::tStatus2* statusChain = NULL) const; 00273 00274 inline void writeG1_Disarm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00275 00276 inline u16 readG1_Disarm_Copy(nMDBG::tStatus2* statusChain = NULL); 00277 00278 // Run-time selectable Register/Field Accessors 00279 private: 00280 u16 _softCopy; 00281 00282 inline void setRegisterMap(tTIO* pTIO); 00283 tTIO* _TIO; 00284 00285 friend class tTIO; 00286 00287 }; 00288 00289 //--------------------------------------------------------------------------- 00290 // G0_Counting_Mode 00291 //--------------------------------------------------------------------------- 00292 class tG0_Counting_Mode : public tReg16IODirect32 00293 { 00294 public: 00295 typedef tReg16IODirect32 tIOStrategy; 00296 typedef tTIO tRegisterMap; 00297 00298 enum { 00299 kOffset = 0xb0, 00300 kId = 2 00301 }; 00302 tG0_Counting_Mode(); 00303 00304 00305 typedef enum { 00306 kRegisterId = 0, 00307 kG0_Encoder_Counting_ModeId = 1, 00308 kG0_Index_EnableId = 3, 00309 kG0_Index_PhaseId = 4, 00310 kG0_HW_Arm_EnableId = 5, 00311 kG0_HW_Arm_SelectId = 6, 00312 kG0_PrescaleId = 8, 00313 kG0_Alternate_SynchronizationId = 9, 00314 kG0_Prescale_By_2Id = 10 00315 } tId; 00316 00317 inline tTIO* registerMap(void); 00318 00319 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00320 00321 // Register Accessors (Compile-time selectable) 00322 inline tG0_Counting_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00323 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00324 00325 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00326 00327 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00328 00329 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00330 00331 // Field Accessors (Compile-time selectable) 00332 inline tG0_Counting_Mode& setG0_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00333 inline u16 getG0_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00334 00335 inline void writeG0_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00336 00337 inline u16 readG0_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL); 00338 00339 inline tG0_Counting_Mode& setG0_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00340 inline u16 getG0_Index_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00341 00342 inline void writeG0_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00343 00344 inline u16 readG0_Index_Enable(nMDBG::tStatus2* statusChain = NULL); 00345 00346 inline tG0_Counting_Mode& setG0_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00347 inline u16 getG0_Index_Phase(nMDBG::tStatus2* statusChain = NULL) const; 00348 00349 inline void writeG0_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00350 00351 inline u16 readG0_Index_Phase(nMDBG::tStatus2* statusChain = NULL); 00352 00353 inline tG0_Counting_Mode& setG0_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00354 inline u16 getG0_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00355 00356 inline void writeG0_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00357 00358 inline u16 readG0_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL); 00359 00360 inline tG0_Counting_Mode& setG0_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00361 inline u16 getG0_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL) const; 00362 00363 inline void writeG0_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00364 00365 inline u16 readG0_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL); 00366 00367 inline tG0_Counting_Mode& setG0_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00368 inline u16 getG0_Prescale(nMDBG::tStatus2* statusChain = NULL) const; 00369 00370 inline void writeG0_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00371 00372 inline u16 readG0_Prescale(nMDBG::tStatus2* statusChain = NULL); 00373 00374 inline tG0_Counting_Mode& setG0_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00375 inline u16 getG0_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL) const; 00376 00377 inline void writeG0_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00378 00379 inline u16 readG0_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL); 00380 00381 inline tG0_Counting_Mode& setG0_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00382 inline u16 getG0_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL) const; 00383 00384 inline void writeG0_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00385 00386 inline u16 readG0_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL); 00387 00388 // Run-time selectable Register/Field Accessors 00389 private: 00390 u16 _softCopy; 00391 00392 inline void setRegisterMap(tTIO* pTIO); 00393 tTIO* _TIO; 00394 00395 friend class tTIO; 00396 00397 }; 00398 00399 //--------------------------------------------------------------------------- 00400 // G0_MSeries_Counting_Mode 00401 //--------------------------------------------------------------------------- 00402 class tG0_MSeries_Counting_Mode : public tReg16IODirect32 00403 { 00404 public: 00405 typedef tReg16IODirect32 tIOStrategy; 00406 typedef tTIO tRegisterMap; 00407 00408 enum { 00409 kOffset = 0xb0, 00410 kId = 3 00411 }; 00412 tG0_MSeries_Counting_Mode(); 00413 00414 00415 typedef enum { 00416 kRegisterId = 0, 00417 kG0_MSeries_Encoder_Counting_ModeId = 1, 00418 kG0_MSeries_Index_EnableId = 3, 00419 kG0_MSeries_Index_PhaseId = 4, 00420 kG0_MSeries_HW_Arm_EnableId = 5, 00421 kG0_MSeries_HW_Arm_SelectId = 6, 00422 kG0_MSeries_PrescaleId = 7, 00423 kG0_MSeries_Alternate_SynchronizationId = 8, 00424 kG0_MSeries_Prescale_By_2Id = 9 00425 } tId; 00426 00427 inline tTIO* registerMap(void); 00428 00429 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00430 00431 // Register Accessors (Compile-time selectable) 00432 inline tG0_MSeries_Counting_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00433 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00434 00435 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00436 00437 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00438 00439 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00440 00441 // Field Accessors (Compile-time selectable) 00442 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00443 inline u16 getG0_MSeries_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00444 00445 inline void writeG0_MSeries_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00446 00447 inline u16 readG0_MSeries_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL); 00448 00449 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00450 inline u16 getG0_MSeries_Index_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00451 00452 inline void writeG0_MSeries_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00453 00454 inline u16 readG0_MSeries_Index_Enable(nMDBG::tStatus2* statusChain = NULL); 00455 00456 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00457 inline u16 getG0_MSeries_Index_Phase(nMDBG::tStatus2* statusChain = NULL) const; 00458 00459 inline void writeG0_MSeries_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00460 00461 inline u16 readG0_MSeries_Index_Phase(nMDBG::tStatus2* statusChain = NULL); 00462 00463 inline tG0_MSeries_Counting_Mode& setG0_MSeries_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00464 inline u16 getG0_MSeries_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00465 00466 inline void writeG0_MSeries_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00467 00468 inline u16 readG0_MSeries_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL); 00469 00470 inline tG0_MSeries_Counting_Mode& setG0_MSeries_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00471 inline u16 getG0_MSeries_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL) const; 00472 00473 inline void writeG0_MSeries_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00474 00475 inline u16 readG0_MSeries_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL); 00476 00477 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00478 inline u16 getG0_MSeries_Prescale(nMDBG::tStatus2* statusChain = NULL) const; 00479 00480 inline void writeG0_MSeries_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00481 00482 inline u16 readG0_MSeries_Prescale(nMDBG::tStatus2* statusChain = NULL); 00483 00484 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00485 inline u16 getG0_MSeries_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL) const; 00486 00487 inline void writeG0_MSeries_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00488 00489 inline u16 readG0_MSeries_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL); 00490 00491 inline tG0_MSeries_Counting_Mode& setG0_MSeries_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00492 inline u16 getG0_MSeries_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL) const; 00493 00494 inline void writeG0_MSeries_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00495 00496 inline u16 readG0_MSeries_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL); 00497 00498 // Run-time selectable Register/Field Accessors 00499 private: 00500 u16 _softCopy; 00501 00502 inline void setRegisterMap(tTIO* pTIO); 00503 tTIO* _TIO; 00504 00505 friend class tTIO; 00506 00507 }; 00508 00509 //--------------------------------------------------------------------------- 00510 // G0_DMA_Control 00511 //--------------------------------------------------------------------------- 00512 class tG0_DMA_Control : public tReg16IODirect32 00513 { 00514 public: 00515 typedef tReg16IODirect32 tIOStrategy; 00516 typedef tTIO tRegisterMap; 00517 00518 enum { 00519 kOffset = 0xb8, 00520 kId = 4 00521 }; 00522 tG0_DMA_Control(); 00523 00524 00525 typedef enum { 00526 kRegisterId = 0, 00527 kG0_DMA_EnableId = 1, 00528 kG0_DMA_Output_EnableId = 2, 00529 kG0_DMA_Int_EnableId = 3 00530 } tId; 00531 00532 inline tTIO* registerMap(void); 00533 00534 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00535 00536 // Register Accessors (Compile-time selectable) 00537 inline tG0_DMA_Control& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00538 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00539 00540 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00541 00542 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00543 00544 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00545 00546 // Field Accessors (Compile-time selectable) 00547 typedef enum { 00548 kG0_DMA_EnableRead = 0, 00549 kG0_DMA_EnableWrite = 1, 00550 } tG0_DMA_Enable; 00551 inline tG0_DMA_Control& setG0_DMA_Enable(tG0_DMA_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 00552 inline tG0_DMA_Enable getG0_DMA_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00553 00554 inline void writeG0_DMA_Enable(tG0_DMA_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 00555 00556 inline tG0_DMA_Enable readG0_DMA_Enable(nMDBG::tStatus2* statusChain = NULL); 00557 00558 inline tG0_DMA_Control& setG0_DMA_Output_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00559 inline u16 getG0_DMA_Output_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00560 00561 inline void writeG0_DMA_Output_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00562 00563 inline u16 readG0_DMA_Output_Enable(nMDBG::tStatus2* statusChain = NULL); 00564 00565 inline tG0_DMA_Control& setG0_DMA_Int_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00566 inline u16 getG0_DMA_Int_Enable(nMDBG::tStatus2* statusChain = NULL) const; 00567 00568 inline void writeG0_DMA_Int_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00569 00570 inline u16 readG0_DMA_Int_Enable(nMDBG::tStatus2* statusChain = NULL); 00571 00572 // Run-time selectable Register/Field Accessors 00573 private: 00574 u16 _softCopy; 00575 00576 inline void setRegisterMap(tTIO* pTIO); 00577 tTIO* _TIO; 00578 00579 friend class tTIO; 00580 00581 }; 00582 00583 //--------------------------------------------------------------------------- 00584 // G0_Input_Select 00585 //--------------------------------------------------------------------------- 00586 class tG0_Input_Select : public tReg16IODirect32 00587 { 00588 public: 00589 typedef tReg16IODirect32 tIOStrategy; 00590 typedef tTIO tRegisterMap; 00591 00592 enum { 00593 kOffset = 0x48, 00594 kId = 5 00595 }; 00596 tG0_Input_Select(); 00597 00598 00599 typedef enum { 00600 kRegisterId = 0, 00601 kG0_Read_Acknowledges_IrqId = 1, 00602 kG0_Write_Acknowledges_IrqId = 2, 00603 kG0_Source_SelectId = 3, 00604 kG0_Gate_SelectId = 4, 00605 kG0_Gate_Select_Load_SourceId = 5, 00606 kG0_OR_GateId = 6, 00607 kG0_Output_PolarityId = 7, 00608 kG0_Source_PolarityId = 8 00609 } tId; 00610 00611 inline tTIO* registerMap(void); 00612 00613 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00614 00615 // Register Accessors (Compile-time selectable) 00616 inline tG0_Input_Select& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00617 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00618 00619 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00620 00621 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00622 00623 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00624 00625 // Field Accessors (Compile-time selectable) 00626 inline tG0_Input_Select& setG0_Read_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00627 inline u16 getG0_Read_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL) const; 00628 00629 inline void writeG0_Read_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00630 00631 inline u16 readG0_Read_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL); 00632 00633 inline tG0_Input_Select& setG0_Write_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00634 inline u16 getG0_Write_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL) const; 00635 00636 inline void writeG0_Write_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00637 00638 inline u16 readG0_Write_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL); 00639 00640 inline tG0_Input_Select& setG0_Source_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00641 inline u16 getG0_Source_Select(nMDBG::tStatus2* statusChain = NULL) const; 00642 00643 inline void writeG0_Source_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00644 00645 inline u16 readG0_Source_Select(nMDBG::tStatus2* statusChain = NULL); 00646 00647 inline tG0_Input_Select& setG0_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00648 inline u16 getG0_Gate_Select(nMDBG::tStatus2* statusChain = NULL) const; 00649 00650 inline void writeG0_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00651 00652 inline u16 readG0_Gate_Select(nMDBG::tStatus2* statusChain = NULL); 00653 00654 inline tG0_Input_Select& setG0_Gate_Select_Load_Source(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00655 inline u16 getG0_Gate_Select_Load_Source(nMDBG::tStatus2* statusChain = NULL) const; 00656 00657 inline void writeG0_Gate_Select_Load_Source(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00658 00659 inline u16 readG0_Gate_Select_Load_Source(nMDBG::tStatus2* statusChain = NULL); 00660 00661 inline tG0_Input_Select& setG0_OR_Gate(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00662 inline u16 getG0_OR_Gate(nMDBG::tStatus2* statusChain = NULL) const; 00663 00664 inline void writeG0_OR_Gate(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00665 00666 inline u16 readG0_OR_Gate(nMDBG::tStatus2* statusChain = NULL); 00667 00668 inline tG0_Input_Select& setG0_Output_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00669 inline u16 getG0_Output_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 00670 00671 inline void writeG0_Output_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00672 00673 inline u16 readG0_Output_Polarity(nMDBG::tStatus2* statusChain = NULL); 00674 00675 inline tG0_Input_Select& setG0_Source_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00676 inline u16 getG0_Source_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 00677 00678 inline void writeG0_Source_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00679 00680 inline u16 readG0_Source_Polarity(nMDBG::tStatus2* statusChain = NULL); 00681 00682 // Run-time selectable Register/Field Accessors 00683 private: 00684 u16 _softCopy; 00685 00686 inline void setRegisterMap(tTIO* pTIO); 00687 tTIO* _TIO; 00688 00689 friend class tTIO; 00690 00691 }; 00692 00693 //--------------------------------------------------------------------------- 00694 // G0_Load_A 00695 //--------------------------------------------------------------------------- 00696 class tG0_Load_A : public tReg32IODirect32 00697 { 00698 public: 00699 typedef tReg32IODirect32 tIOStrategy; 00700 typedef tTIO tRegisterMap; 00701 00702 enum { 00703 kOffset = 0x38, 00704 kId = 6 00705 }; 00706 tG0_Load_A(); 00707 00708 00709 typedef enum { 00710 kRegisterId = 0, 00711 kDefaultId = 1 00712 } tId; 00713 00714 inline tTIO* registerMap(void); 00715 00716 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00717 00718 // Register Accessors (Compile-time selectable) 00719 inline tG0_Load_A& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 00720 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00721 00722 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00723 00724 inline void writeRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 00725 00726 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 00727 00728 // Field Accessors (Compile-time selectable) 00729 inline tG0_Load_A& set(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00730 inline u32 get(nMDBG::tStatus2* statusChain = NULL) const; 00731 00732 inline void write(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00733 00734 inline u32 read(nMDBG::tStatus2* statusChain = NULL); 00735 00736 // Run-time selectable Register/Field Accessors 00737 private: 00738 u32 _softCopy; 00739 00740 inline void setRegisterMap(tTIO* pTIO); 00741 tTIO* _TIO; 00742 00743 friend class tTIO; 00744 00745 }; 00746 00747 //--------------------------------------------------------------------------- 00748 // G0_Load_B 00749 //--------------------------------------------------------------------------- 00750 class tG0_Load_B : public tReg32IODirect32 00751 { 00752 public: 00753 typedef tReg32IODirect32 tIOStrategy; 00754 typedef tTIO tRegisterMap; 00755 00756 enum { 00757 kOffset = 0x3c, 00758 kId = 7 00759 }; 00760 tG0_Load_B(); 00761 00762 00763 typedef enum { 00764 kRegisterId = 0, 00765 kDefaultId = 1 00766 } tId; 00767 00768 inline tTIO* registerMap(void); 00769 00770 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00771 00772 // Register Accessors (Compile-time selectable) 00773 inline tG0_Load_B& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 00774 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00775 00776 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00777 00778 inline void writeRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 00779 00780 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 00781 00782 // Field Accessors (Compile-time selectable) 00783 inline tG0_Load_B& set(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00784 inline u32 get(nMDBG::tStatus2* statusChain = NULL) const; 00785 00786 inline void write(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00787 00788 inline u32 read(nMDBG::tStatus2* statusChain = NULL); 00789 00790 // Run-time selectable Register/Field Accessors 00791 private: 00792 u32 _softCopy; 00793 00794 inline void setRegisterMap(tTIO* pTIO); 00795 tTIO* _TIO; 00796 00797 friend class tTIO; 00798 00799 }; 00800 00801 //--------------------------------------------------------------------------- 00802 // G0_Mode 00803 //--------------------------------------------------------------------------- 00804 class tG0_Mode : public tReg16IODirect32 00805 { 00806 public: 00807 typedef tReg16IODirect32 tIOStrategy; 00808 typedef tTIO tRegisterMap; 00809 00810 enum { 00811 kOffset = 0x34, 00812 kId = 8 00813 }; 00814 tG0_Mode(); 00815 00816 00817 typedef enum { 00818 kRegisterId = 0, 00819 kG0_Gating_ModeId = 1, 00820 kG0_Gate_On_Both_EdgesId = 2, 00821 kG0_Trigger_Mode_For_Edge_GateId = 3, 00822 kG0_Stop_ModeId = 4, 00823 kG0_Load_Source_SelectId = 5, 00824 kG0_Output_ModeId = 6, 00825 kG0_Counting_OnceId = 7, 00826 kG0_Loading_On_TCId = 8, 00827 kG0_Gate_PolarityId = 9, 00828 kG0_Loading_On_GateId = 10, 00829 kG0_Reload_Source_SwitchingId = 11 00830 } tId; 00831 00832 inline tTIO* registerMap(void); 00833 00834 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 00835 00836 // Register Accessors (Compile-time selectable) 00837 inline tG0_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00838 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 00839 00840 inline void flush(nMDBG::tStatus2* statusChain = NULL); 00841 00842 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 00843 00844 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 00845 00846 // Field Accessors (Compile-time selectable) 00847 typedef enum { 00848 kG0_Gating_ModeGating_Disabled = 0, 00849 kG0_Gating_ModeLevel_Gating = 1, 00850 kG0_Gating_ModeEdge_Gating_Active_High = 2, 00851 kG0_Gating_ModeEdge_Gating_Active_Low = 3, 00852 } tG0_Gating_Mode; 00853 inline tG0_Mode& setG0_Gating_Mode(tG0_Gating_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00854 inline tG0_Gating_Mode getG0_Gating_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00855 00856 inline void writeG0_Gating_Mode(tG0_Gating_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00857 00858 inline tG0_Gating_Mode readG0_Gating_Mode(nMDBG::tStatus2* statusChain = NULL); 00859 00860 typedef enum { 00861 kG0_Gate_On_Both_EdgesBoth_Edges_Disabled = 0, 00862 kG0_Gate_On_Both_EdgesBoth_Edges_Enabled = 1, 00863 } tG0_Gate_On_Both_Edges; 00864 inline tG0_Mode& setG0_Gate_On_Both_Edges(tG0_Gate_On_Both_Edges fieldValue, nMDBG::tStatus2* statusChain = NULL); 00865 inline tG0_Gate_On_Both_Edges getG0_Gate_On_Both_Edges(nMDBG::tStatus2* statusChain = NULL) const; 00866 00867 inline void writeG0_Gate_On_Both_Edges(tG0_Gate_On_Both_Edges fieldValue, nMDBG::tStatus2* statusChain = NULL); 00868 00869 inline tG0_Gate_On_Both_Edges readG0_Gate_On_Both_Edges(nMDBG::tStatus2* statusChain = NULL); 00870 00871 typedef enum { 00872 kG0_Trigger_Mode_For_Edge_GateFirst_Starts_Next_Stops = 0, 00873 kG0_Trigger_Mode_For_Edge_GateFirst_Starts_Next_Starts = 1, 00874 kG0_Trigger_Mode_For_Edge_GateGate_Starts_TC_Stops = 2, 00875 kG0_Trigger_Mode_For_Edge_GateGate_Does_Not_Stop = 3, 00876 } tG0_Trigger_Mode_For_Edge_Gate; 00877 inline tG0_Mode& setG0_Trigger_Mode_For_Edge_Gate(tG0_Trigger_Mode_For_Edge_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00878 inline tG0_Trigger_Mode_For_Edge_Gate getG0_Trigger_Mode_For_Edge_Gate(nMDBG::tStatus2* statusChain = NULL) const; 00879 00880 inline void writeG0_Trigger_Mode_For_Edge_Gate(tG0_Trigger_Mode_For_Edge_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00881 00882 inline tG0_Trigger_Mode_For_Edge_Gate readG0_Trigger_Mode_For_Edge_Gate(nMDBG::tStatus2* statusChain = NULL); 00883 00884 typedef enum { 00885 kG0_Stop_ModeStop_On_Gate = 0, 00886 kG0_Stop_ModeStop_On_Gate_Or_First_TC = 1, 00887 kG0_Stop_ModeStop_On_Gate_Or_Second_TC = 2, 00888 kG0_Stop_ModeStop_Mode_Reserved = 3, 00889 } tG0_Stop_Mode; 00890 inline tG0_Mode& setG0_Stop_Mode(tG0_Stop_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00891 inline tG0_Stop_Mode getG0_Stop_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00892 00893 inline void writeG0_Stop_Mode(tG0_Stop_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00894 00895 inline tG0_Stop_Mode readG0_Stop_Mode(nMDBG::tStatus2* statusChain = NULL); 00896 00897 typedef enum { 00898 kG0_Load_Source_SelectLoad_A = 0, 00899 kG0_Load_Source_SelectLoad_B = 1, 00900 } tG0_Load_Source_Select; 00901 inline tG0_Mode& setG0_Load_Source_Select(tG0_Load_Source_Select fieldValue, nMDBG::tStatus2* statusChain = NULL); 00902 inline tG0_Load_Source_Select getG0_Load_Source_Select(nMDBG::tStatus2* statusChain = NULL) const; 00903 00904 inline void writeG0_Load_Source_Select(tG0_Load_Source_Select fieldValue, nMDBG::tStatus2* statusChain = NULL); 00905 00906 inline tG0_Load_Source_Select readG0_Load_Source_Select(nMDBG::tStatus2* statusChain = NULL); 00907 00908 typedef enum { 00909 kG0_Output_ModeReserved = 0, 00910 kG0_Output_ModePulse = 1, 00911 kG0_Output_ModeToggle = 2, 00912 kG0_Output_ModeToggle_On_TC_Or_Gate = 3, 00913 } tG0_Output_Mode; 00914 inline tG0_Mode& setG0_Output_Mode(tG0_Output_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00915 inline tG0_Output_Mode getG0_Output_Mode(nMDBG::tStatus2* statusChain = NULL) const; 00916 00917 inline void writeG0_Output_Mode(tG0_Output_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 00918 00919 inline tG0_Output_Mode readG0_Output_Mode(nMDBG::tStatus2* statusChain = NULL); 00920 00921 typedef enum { 00922 kG0_Counting_OnceNo_HW_Disarm = 0, 00923 kG0_Counting_OnceDisarm_On_TC = 1, 00924 kG0_Counting_OnceDisarm_On_Gate = 2, 00925 kG0_Counting_OnceDisarm_On_Gate_Or_TC = 3, 00926 } tG0_Counting_Once; 00927 inline tG0_Mode& setG0_Counting_Once(tG0_Counting_Once fieldValue, nMDBG::tStatus2* statusChain = NULL); 00928 inline tG0_Counting_Once getG0_Counting_Once(nMDBG::tStatus2* statusChain = NULL) const; 00929 00930 inline void writeG0_Counting_Once(tG0_Counting_Once fieldValue, nMDBG::tStatus2* statusChain = NULL); 00931 00932 inline tG0_Counting_Once readG0_Counting_Once(nMDBG::tStatus2* statusChain = NULL); 00933 00934 typedef enum { 00935 kG0_Loading_On_TCRollover_On_TC = 0, 00936 kG0_Loading_On_TCReload_On_TC = 1, 00937 } tG0_Loading_On_TC; 00938 inline tG0_Mode& setG0_Loading_On_TC(tG0_Loading_On_TC fieldValue, nMDBG::tStatus2* statusChain = NULL); 00939 inline tG0_Loading_On_TC getG0_Loading_On_TC(nMDBG::tStatus2* statusChain = NULL) const; 00940 00941 inline void writeG0_Loading_On_TC(tG0_Loading_On_TC fieldValue, nMDBG::tStatus2* statusChain = NULL); 00942 00943 inline tG0_Loading_On_TC readG0_Loading_On_TC(nMDBG::tStatus2* statusChain = NULL); 00944 00945 inline tG0_Mode& setG0_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00946 inline u16 getG0_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 00947 00948 inline void writeG0_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 00949 00950 inline u16 readG0_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL); 00951 00952 typedef enum { 00953 kG0_Loading_On_GateNo_Reload = 0, 00954 kG0_Loading_On_GateReload_On_Stop_Gate = 1, 00955 } tG0_Loading_On_Gate; 00956 inline tG0_Mode& setG0_Loading_On_Gate(tG0_Loading_On_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00957 inline tG0_Loading_On_Gate getG0_Loading_On_Gate(nMDBG::tStatus2* statusChain = NULL) const; 00958 00959 inline void writeG0_Loading_On_Gate(tG0_Loading_On_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 00960 00961 inline tG0_Loading_On_Gate readG0_Loading_On_Gate(nMDBG::tStatus2* statusChain = NULL); 00962 00963 typedef enum { 00964 kG0_Reload_Source_SwitchingUse_Same = 0, 00965 kG0_Reload_Source_SwitchingAlternate = 1, 00966 } tG0_Reload_Source_Switching; 00967 inline tG0_Mode& setG0_Reload_Source_Switching(tG0_Reload_Source_Switching fieldValue, nMDBG::tStatus2* statusChain = NULL); 00968 inline tG0_Reload_Source_Switching getG0_Reload_Source_Switching(nMDBG::tStatus2* statusChain = NULL) const; 00969 00970 inline void writeG0_Reload_Source_Switching(tG0_Reload_Source_Switching fieldValue, nMDBG::tStatus2* statusChain = NULL); 00971 00972 inline tG0_Reload_Source_Switching readG0_Reload_Source_Switching(nMDBG::tStatus2* statusChain = NULL); 00973 00974 // Run-time selectable Register/Field Accessors 00975 private: 00976 u16 _softCopy; 00977 00978 inline void setRegisterMap(tTIO* pTIO); 00979 tTIO* _TIO; 00980 00981 friend class tTIO; 00982 00983 }; 00984 00985 //--------------------------------------------------------------------------- 00986 // G0_Second_Gate 00987 //--------------------------------------------------------------------------- 00988 class tG0_Second_Gate : public tReg16IODirect32 00989 { 00990 public: 00991 typedef tReg16IODirect32 tIOStrategy; 00992 typedef tTIO tRegisterMap; 00993 00994 enum { 00995 kOffset = 0xb4, 00996 kId = 9 00997 }; 00998 tG0_Second_Gate(); 00999 01000 01001 typedef enum { 01002 kRegisterId = 0, 01003 kG0_Second_Gate_Gating_ModeId = 1, 01004 kG0_Second_Gate_SelectId = 3, 01005 kG0_Second_Gate_PolarityId = 5, 01006 kG0_MSeries_Second_Gate_SubSelectId = 6, 01007 kG0_MSeries_Source_SubSelectId = 7 01008 } tId; 01009 01010 inline tTIO* registerMap(void); 01011 01012 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01013 01014 // Register Accessors (Compile-time selectable) 01015 inline tG0_Second_Gate& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01016 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01017 01018 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01019 01020 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01021 01022 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01023 01024 // Field Accessors (Compile-time selectable) 01025 inline tG0_Second_Gate& setG0_Second_Gate_Gating_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01026 inline u16 getG0_Second_Gate_Gating_Mode(nMDBG::tStatus2* statusChain = NULL) const; 01027 01028 inline void writeG0_Second_Gate_Gating_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01029 01030 inline u16 readG0_Second_Gate_Gating_Mode(nMDBG::tStatus2* statusChain = NULL); 01031 01032 inline tG0_Second_Gate& setG0_Second_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01033 inline u16 getG0_Second_Gate_Select(nMDBG::tStatus2* statusChain = NULL) const; 01034 01035 inline void writeG0_Second_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01036 01037 inline u16 readG0_Second_Gate_Select(nMDBG::tStatus2* statusChain = NULL); 01038 01039 inline tG0_Second_Gate& setG0_Second_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01040 inline u16 getG0_Second_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 01041 01042 inline void writeG0_Second_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01043 01044 inline u16 readG0_Second_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL); 01045 01046 inline tG0_Second_Gate& setG0_MSeries_Second_Gate_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01047 inline u16 getG0_MSeries_Second_Gate_SubSelect(nMDBG::tStatus2* statusChain = NULL) const; 01048 01049 inline void writeG0_MSeries_Second_Gate_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01050 01051 inline u16 readG0_MSeries_Second_Gate_SubSelect(nMDBG::tStatus2* statusChain = NULL); 01052 01053 inline tG0_Second_Gate& setG0_MSeries_Source_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01054 inline u16 getG0_MSeries_Source_SubSelect(nMDBG::tStatus2* statusChain = NULL) const; 01055 01056 inline void writeG0_MSeries_Source_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01057 01058 inline u16 readG0_MSeries_Source_SubSelect(nMDBG::tStatus2* statusChain = NULL); 01059 01060 // Run-time selectable Register/Field Accessors 01061 private: 01062 u16 _softCopy; 01063 01064 inline void setRegisterMap(tTIO* pTIO); 01065 tTIO* _TIO; 01066 01067 friend class tTIO; 01068 01069 }; 01070 01071 //--------------------------------------------------------------------------- 01072 // G0_MSeries_ABZ 01073 //--------------------------------------------------------------------------- 01074 class tG0_MSeries_ABZ : public tReg16IODirect32 01075 { 01076 public: 01077 typedef tReg16IODirect32 tIOStrategy; 01078 typedef tTIO tRegisterMap; 01079 01080 enum { 01081 kOffset = 0xc0, 01082 kId = 10 01083 }; 01084 tG0_MSeries_ABZ(); 01085 01086 01087 typedef enum { 01088 kRegisterId = 0, 01089 kG0_Z_SelectId = 1, 01090 kG0_B_SelectId = 2, 01091 kG0_A_SelectId = 3 01092 } tId; 01093 01094 inline tTIO* registerMap(void); 01095 01096 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01097 01098 // Register Accessors (Compile-time selectable) 01099 inline tG0_MSeries_ABZ& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01100 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01101 01102 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01103 01104 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01105 01106 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01107 01108 // Field Accessors (Compile-time selectable) 01109 inline tG0_MSeries_ABZ& setG0_Z_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01110 inline u16 getG0_Z_Select(nMDBG::tStatus2* statusChain = NULL) const; 01111 01112 inline void writeG0_Z_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01113 01114 inline u16 readG0_Z_Select(nMDBG::tStatus2* statusChain = NULL); 01115 01116 inline tG0_MSeries_ABZ& setG0_B_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01117 inline u16 getG0_B_Select(nMDBG::tStatus2* statusChain = NULL) const; 01118 01119 inline void writeG0_B_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01120 01121 inline u16 readG0_B_Select(nMDBG::tStatus2* statusChain = NULL); 01122 01123 inline tG0_MSeries_ABZ& setG0_A_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01124 inline u16 getG0_A_Select(nMDBG::tStatus2* statusChain = NULL) const; 01125 01126 inline void writeG0_A_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01127 01128 inline u16 readG0_A_Select(nMDBG::tStatus2* statusChain = NULL); 01129 01130 // Run-time selectable Register/Field Accessors 01131 private: 01132 u16 _softCopy; 01133 01134 inline void setRegisterMap(tTIO* pTIO); 01135 tTIO* _TIO; 01136 01137 friend class tTIO; 01138 01139 }; 01140 01141 //--------------------------------------------------------------------------- 01142 // G01_Joint_Reset 01143 //--------------------------------------------------------------------------- 01144 class tG01_Joint_Reset : public tReg16IODirect32 01145 { 01146 public: 01147 typedef tReg16IODirect32 tIOStrategy; 01148 typedef tTIO tRegisterMap; 01149 01150 enum { 01151 kOffset = 0x90, 01152 kId = 11 01153 }; 01154 tG01_Joint_Reset(); 01155 01156 01157 typedef enum { 01158 kRegisterId = 0, 01159 kG0_ResetId = 2, 01160 kG1_ResetId = 3 01161 } tId; 01162 01163 inline tTIO* registerMap(void); 01164 01165 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01166 01167 // Register Accessors (Compile-time selectable) 01168 inline tG01_Joint_Reset& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01169 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01170 01171 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01172 01173 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01174 01175 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01176 01177 // Field Accessors (Compile-time selectable) 01178 inline tG01_Joint_Reset& setG0_Reset(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01179 inline u16 getG0_Reset(nMDBG::tStatus2* statusChain = NULL) const; 01180 01181 inline void writeG0_Reset(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01182 01183 inline u16 readG0_Reset(nMDBG::tStatus2* statusChain = NULL); 01184 01185 inline tG01_Joint_Reset& setG1_Reset(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01186 inline u16 getG1_Reset(nMDBG::tStatus2* statusChain = NULL) const; 01187 01188 inline void writeG1_Reset(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01189 01190 inline u16 readG1_Reset(nMDBG::tStatus2* statusChain = NULL); 01191 01192 // Run-time selectable Register/Field Accessors 01193 private: 01194 u16 _softCopy; 01195 01196 inline void setRegisterMap(tTIO* pTIO); 01197 tTIO* _TIO; 01198 01199 friend class tTIO; 01200 01201 }; 01202 01203 //--------------------------------------------------------------------------- 01204 // G1_AutoIncrement 01205 //--------------------------------------------------------------------------- 01206 class tG1_AutoIncrement : public tReg16IODirect32 01207 { 01208 public: 01209 typedef tReg16IODirect32 tIOStrategy; 01210 typedef tTIO tRegisterMap; 01211 01212 enum { 01213 kOffset = 0x8a, 01214 kId = 12 01215 }; 01216 tG1_AutoIncrement(); 01217 01218 01219 typedef enum { 01220 kRegisterId = 0, 01221 kDefaultId = 1 01222 } tId; 01223 01224 inline tTIO* registerMap(void); 01225 01226 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01227 01228 // Register Accessors (Compile-time selectable) 01229 inline tG1_AutoIncrement& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01230 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01231 01232 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01233 01234 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01235 01236 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01237 01238 // Field Accessors (Compile-time selectable) 01239 inline tG1_AutoIncrement& set(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01240 inline u16 get(nMDBG::tStatus2* statusChain = NULL) const; 01241 01242 inline void write(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01243 01244 inline u16 read(nMDBG::tStatus2* statusChain = NULL); 01245 01246 // Run-time selectable Register/Field Accessors 01247 private: 01248 u16 _softCopy; 01249 01250 inline void setRegisterMap(tTIO* pTIO); 01251 tTIO* _TIO; 01252 01253 friend class tTIO; 01254 01255 }; 01256 01257 //--------------------------------------------------------------------------- 01258 // G1_Command 01259 //--------------------------------------------------------------------------- 01260 class tG1_Command : public tReg16IODirect32 01261 { 01262 public: 01263 typedef tReg16IODirect32 tIOStrategy; 01264 typedef tTIO tRegisterMap; 01265 01266 enum { 01267 kOffset = 0xe, 01268 kId = 13 01269 }; 01270 tG1_Command(); 01271 01272 01273 typedef enum { 01274 kRegisterId = 0, 01275 kG1_ArmId = 1, 01276 kG1_Save_TraceId = 2, 01277 kG1_LoadId = 3, 01278 kG1_DisarmId = 5, 01279 kG1_Up_DownId = 6, 01280 kG1_Write_SwitchId = 7, 01281 kG1_Synchronized_GateId = 8, 01282 kG1_Little_Big_EndianId = 9, 01283 kG1_Bank_Switch_StartId = 10, 01284 kG1_Bank_Switch_ModeId = 11, 01285 kG1_Bank_Switch_EnableId = 12, 01286 kG0_Arm_CopyId = 13, 01287 kG0_Save_Trace_CopyId = 14, 01288 kG0_Disarm_CopyId = 15 01289 } tId; 01290 01291 inline tTIO* registerMap(void); 01292 01293 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01294 01295 // Register Accessors (Compile-time selectable) 01296 inline tG1_Command& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01297 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01298 01299 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01300 01301 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01302 01303 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01304 01305 // Field Accessors (Compile-time selectable) 01306 inline tG1_Command& setG1_Arm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01307 inline u16 getG1_Arm(nMDBG::tStatus2* statusChain = NULL) const; 01308 01309 inline void writeG1_Arm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01310 01311 inline u16 readG1_Arm(nMDBG::tStatus2* statusChain = NULL); 01312 01313 inline tG1_Command& setG1_Save_Trace(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01314 inline u16 getG1_Save_Trace(nMDBG::tStatus2* statusChain = NULL) const; 01315 01316 inline void writeG1_Save_Trace(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01317 01318 inline u16 readG1_Save_Trace(nMDBG::tStatus2* statusChain = NULL); 01319 01320 inline tG1_Command& setG1_Load(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01321 inline u16 getG1_Load(nMDBG::tStatus2* statusChain = NULL) const; 01322 01323 inline void writeG1_Load(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01324 01325 inline u16 readG1_Load(nMDBG::tStatus2* statusChain = NULL); 01326 01327 inline tG1_Command& setG1_Disarm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01328 inline u16 getG1_Disarm(nMDBG::tStatus2* statusChain = NULL) const; 01329 01330 inline void writeG1_Disarm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01331 01332 inline u16 readG1_Disarm(nMDBG::tStatus2* statusChain = NULL); 01333 01334 typedef enum { 01335 kG1_Up_DownSoftware_Down = 0, 01336 kG1_Up_DownSoftware_Up = 1, 01337 kG1_Up_DownHardware = 2, 01338 kG1_Up_DownHardware_Gate = 3, 01339 } tG1_Up_Down; 01340 inline tG1_Command& setG1_Up_Down(tG1_Up_Down fieldValue, nMDBG::tStatus2* statusChain = NULL); 01341 inline tG1_Up_Down getG1_Up_Down(nMDBG::tStatus2* statusChain = NULL) const; 01342 01343 inline void writeG1_Up_Down(tG1_Up_Down fieldValue, nMDBG::tStatus2* statusChain = NULL); 01344 01345 inline tG1_Up_Down readG1_Up_Down(nMDBG::tStatus2* statusChain = NULL); 01346 01347 typedef enum { 01348 kG1_Write_SwitchAlways_Load_A = 0, 01349 kG1_Write_SwitchInactive_Load = 1, 01350 } tG1_Write_Switch; 01351 inline tG1_Command& setG1_Write_Switch(tG1_Write_Switch fieldValue, nMDBG::tStatus2* statusChain = NULL); 01352 inline tG1_Write_Switch getG1_Write_Switch(nMDBG::tStatus2* statusChain = NULL) const; 01353 01354 inline void writeG1_Write_Switch(tG1_Write_Switch fieldValue, nMDBG::tStatus2* statusChain = NULL); 01355 01356 inline tG1_Write_Switch readG1_Write_Switch(nMDBG::tStatus2* statusChain = NULL); 01357 01358 typedef enum { 01359 kG1_Synchronized_GateDisabled = 0, 01360 kG1_Synchronized_GateEnabled = 1, 01361 } tG1_Synchronized_Gate; 01362 inline tG1_Command& setG1_Synchronized_Gate(tG1_Synchronized_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 01363 inline tG1_Synchronized_Gate getG1_Synchronized_Gate(nMDBG::tStatus2* statusChain = NULL) const; 01364 01365 inline void writeG1_Synchronized_Gate(tG1_Synchronized_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 01366 01367 inline tG1_Synchronized_Gate readG1_Synchronized_Gate(nMDBG::tStatus2* statusChain = NULL); 01368 01369 typedef enum { 01370 kG1_Little_Big_EndianLow_Register = 0, 01371 kG1_Little_Big_EndianHigh_Register = 1, 01372 } tG1_Little_Big_Endian; 01373 inline tG1_Command& setG1_Little_Big_Endian(tG1_Little_Big_Endian fieldValue, nMDBG::tStatus2* statusChain = NULL); 01374 inline tG1_Little_Big_Endian getG1_Little_Big_Endian(nMDBG::tStatus2* statusChain = NULL) const; 01375 01376 inline void writeG1_Little_Big_Endian(tG1_Little_Big_Endian fieldValue, nMDBG::tStatus2* statusChain = NULL); 01377 01378 inline tG1_Little_Big_Endian readG1_Little_Big_Endian(nMDBG::tStatus2* statusChain = NULL); 01379 01380 inline tG1_Command& setG1_Bank_Switch_Start(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01381 inline u16 getG1_Bank_Switch_Start(nMDBG::tStatus2* statusChain = NULL) const; 01382 01383 inline void writeG1_Bank_Switch_Start(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01384 01385 inline u16 readG1_Bank_Switch_Start(nMDBG::tStatus2* statusChain = NULL); 01386 01387 typedef enum { 01388 kG1_Bank_Switch_ModeGate = 0, 01389 kG1_Bank_Switch_ModeSoftware = 1, 01390 } tG1_Bank_Switch_Mode; 01391 inline tG1_Command& setG1_Bank_Switch_Mode(tG1_Bank_Switch_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 01392 inline tG1_Bank_Switch_Mode getG1_Bank_Switch_Mode(nMDBG::tStatus2* statusChain = NULL) const; 01393 01394 inline void writeG1_Bank_Switch_Mode(tG1_Bank_Switch_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 01395 01396 inline tG1_Bank_Switch_Mode readG1_Bank_Switch_Mode(nMDBG::tStatus2* statusChain = NULL); 01397 01398 typedef enum { 01399 kG1_Bank_Switch_EnableBank_X = 0, 01400 kG1_Bank_Switch_EnableBank_Y = 1, 01401 } tG1_Bank_Switch_Enable; 01402 inline tG1_Command& setG1_Bank_Switch_Enable(tG1_Bank_Switch_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 01403 inline tG1_Bank_Switch_Enable getG1_Bank_Switch_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01404 01405 inline void writeG1_Bank_Switch_Enable(tG1_Bank_Switch_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 01406 01407 inline tG1_Bank_Switch_Enable readG1_Bank_Switch_Enable(nMDBG::tStatus2* statusChain = NULL); 01408 01409 inline tG1_Command& setG0_Arm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01410 inline u16 getG0_Arm_Copy(nMDBG::tStatus2* statusChain = NULL) const; 01411 01412 inline void writeG0_Arm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01413 01414 inline u16 readG0_Arm_Copy(nMDBG::tStatus2* statusChain = NULL); 01415 01416 inline tG1_Command& setG0_Save_Trace_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01417 inline u16 getG0_Save_Trace_Copy(nMDBG::tStatus2* statusChain = NULL) const; 01418 01419 inline void writeG0_Save_Trace_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01420 01421 inline u16 readG0_Save_Trace_Copy(nMDBG::tStatus2* statusChain = NULL); 01422 01423 inline tG1_Command& setG0_Disarm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01424 inline u16 getG0_Disarm_Copy(nMDBG::tStatus2* statusChain = NULL) const; 01425 01426 inline void writeG0_Disarm_Copy(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01427 01428 inline u16 readG0_Disarm_Copy(nMDBG::tStatus2* statusChain = NULL); 01429 01430 // Run-time selectable Register/Field Accessors 01431 private: 01432 u16 _softCopy; 01433 01434 inline void setRegisterMap(tTIO* pTIO); 01435 tTIO* _TIO; 01436 01437 friend class tTIO; 01438 01439 }; 01440 01441 //--------------------------------------------------------------------------- 01442 // G1_Counting_Mode 01443 //--------------------------------------------------------------------------- 01444 class tG1_Counting_Mode : public tReg16IODirect32 01445 { 01446 public: 01447 typedef tReg16IODirect32 tIOStrategy; 01448 typedef tTIO tRegisterMap; 01449 01450 enum { 01451 kOffset = 0xb2, 01452 kId = 14 01453 }; 01454 tG1_Counting_Mode(); 01455 01456 01457 typedef enum { 01458 kRegisterId = 0, 01459 kG1_Encoder_Counting_ModeId = 1, 01460 kG1_Index_EnableId = 3, 01461 kG1_Index_PhaseId = 4, 01462 kG1_HW_Arm_EnableId = 5, 01463 kG1_HW_Arm_SelectId = 6, 01464 kG1_PrescaleId = 8, 01465 kG1_Alternate_SynchronizationId = 9, 01466 kG1_Prescale_By_2Id = 10 01467 } tId; 01468 01469 inline tTIO* registerMap(void); 01470 01471 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01472 01473 // Register Accessors (Compile-time selectable) 01474 inline tG1_Counting_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01475 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01476 01477 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01478 01479 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01480 01481 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01482 01483 // Field Accessors (Compile-time selectable) 01484 inline tG1_Counting_Mode& setG1_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01485 inline u16 getG1_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL) const; 01486 01487 inline void writeG1_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01488 01489 inline u16 readG1_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL); 01490 01491 inline tG1_Counting_Mode& setG1_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01492 inline u16 getG1_Index_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01493 01494 inline void writeG1_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01495 01496 inline u16 readG1_Index_Enable(nMDBG::tStatus2* statusChain = NULL); 01497 01498 inline tG1_Counting_Mode& setG1_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01499 inline u16 getG1_Index_Phase(nMDBG::tStatus2* statusChain = NULL) const; 01500 01501 inline void writeG1_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01502 01503 inline u16 readG1_Index_Phase(nMDBG::tStatus2* statusChain = NULL); 01504 01505 inline tG1_Counting_Mode& setG1_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01506 inline u16 getG1_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01507 01508 inline void writeG1_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01509 01510 inline u16 readG1_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL); 01511 01512 inline tG1_Counting_Mode& setG1_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01513 inline u16 getG1_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL) const; 01514 01515 inline void writeG1_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01516 01517 inline u16 readG1_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL); 01518 01519 inline tG1_Counting_Mode& setG1_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01520 inline u16 getG1_Prescale(nMDBG::tStatus2* statusChain = NULL) const; 01521 01522 inline void writeG1_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01523 01524 inline u16 readG1_Prescale(nMDBG::tStatus2* statusChain = NULL); 01525 01526 inline tG1_Counting_Mode& setG1_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01527 inline u16 getG1_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL) const; 01528 01529 inline void writeG1_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01530 01531 inline u16 readG1_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL); 01532 01533 inline tG1_Counting_Mode& setG1_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01534 inline u16 getG1_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL) const; 01535 01536 inline void writeG1_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01537 01538 inline u16 readG1_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL); 01539 01540 // Run-time selectable Register/Field Accessors 01541 private: 01542 u16 _softCopy; 01543 01544 inline void setRegisterMap(tTIO* pTIO); 01545 tTIO* _TIO; 01546 01547 friend class tTIO; 01548 01549 }; 01550 01551 //--------------------------------------------------------------------------- 01552 // G1_MSeries_Counting_Mode 01553 //--------------------------------------------------------------------------- 01554 class tG1_MSeries_Counting_Mode : public tReg16IODirect32 01555 { 01556 public: 01557 typedef tReg16IODirect32 tIOStrategy; 01558 typedef tTIO tRegisterMap; 01559 01560 enum { 01561 kOffset = 0xb2, 01562 kId = 15 01563 }; 01564 tG1_MSeries_Counting_Mode(); 01565 01566 01567 typedef enum { 01568 kRegisterId = 0, 01569 kG1_MSeries_Encoder_Counting_ModeId = 1, 01570 kG1_MSeries_Index_EnableId = 3, 01571 kG1_MSeries_Index_PhaseId = 4, 01572 kG1_MSeries_HW_Arm_EnableId = 5, 01573 kG1_MSeries_HW_Arm_SelectId = 6, 01574 kG1_MSeries_PrescaleId = 7, 01575 kG1_MSeries_Alternate_SynchronizationId = 8, 01576 kG1_MSeries_Prescale_By_2Id = 9 01577 } tId; 01578 01579 inline tTIO* registerMap(void); 01580 01581 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01582 01583 // Register Accessors (Compile-time selectable) 01584 inline tG1_MSeries_Counting_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01585 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01586 01587 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01588 01589 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01590 01591 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01592 01593 // Field Accessors (Compile-time selectable) 01594 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01595 inline u16 getG1_MSeries_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL) const; 01596 01597 inline void writeG1_MSeries_Encoder_Counting_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01598 01599 inline u16 readG1_MSeries_Encoder_Counting_Mode(nMDBG::tStatus2* statusChain = NULL); 01600 01601 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01602 inline u16 getG1_MSeries_Index_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01603 01604 inline void writeG1_MSeries_Index_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01605 01606 inline u16 readG1_MSeries_Index_Enable(nMDBG::tStatus2* statusChain = NULL); 01607 01608 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01609 inline u16 getG1_MSeries_Index_Phase(nMDBG::tStatus2* statusChain = NULL) const; 01610 01611 inline void writeG1_MSeries_Index_Phase(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01612 01613 inline u16 readG1_MSeries_Index_Phase(nMDBG::tStatus2* statusChain = NULL); 01614 01615 inline tG1_MSeries_Counting_Mode& setG1_MSeries_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01616 inline u16 getG1_MSeries_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01617 01618 inline void writeG1_MSeries_HW_Arm_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01619 01620 inline u16 readG1_MSeries_HW_Arm_Enable(nMDBG::tStatus2* statusChain = NULL); 01621 01622 inline tG1_MSeries_Counting_Mode& setG1_MSeries_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01623 inline u16 getG1_MSeries_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL) const; 01624 01625 inline void writeG1_MSeries_HW_Arm_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01626 01627 inline u16 readG1_MSeries_HW_Arm_Select(nMDBG::tStatus2* statusChain = NULL); 01628 01629 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01630 inline u16 getG1_MSeries_Prescale(nMDBG::tStatus2* statusChain = NULL) const; 01631 01632 inline void writeG1_MSeries_Prescale(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01633 01634 inline u16 readG1_MSeries_Prescale(nMDBG::tStatus2* statusChain = NULL); 01635 01636 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01637 inline u16 getG1_MSeries_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL) const; 01638 01639 inline void writeG1_MSeries_Alternate_Synchronization(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01640 01641 inline u16 readG1_MSeries_Alternate_Synchronization(nMDBG::tStatus2* statusChain = NULL); 01642 01643 inline tG1_MSeries_Counting_Mode& setG1_MSeries_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01644 inline u16 getG1_MSeries_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL) const; 01645 01646 inline void writeG1_MSeries_Prescale_By_2(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01647 01648 inline u16 readG1_MSeries_Prescale_By_2(nMDBG::tStatus2* statusChain = NULL); 01649 01650 // Run-time selectable Register/Field Accessors 01651 private: 01652 u16 _softCopy; 01653 01654 inline void setRegisterMap(tTIO* pTIO); 01655 tTIO* _TIO; 01656 01657 friend class tTIO; 01658 01659 }; 01660 01661 //--------------------------------------------------------------------------- 01662 // G1_DMA_Control 01663 //--------------------------------------------------------------------------- 01664 class tG1_DMA_Control : public tReg16IODirect32 01665 { 01666 public: 01667 typedef tReg16IODirect32 tIOStrategy; 01668 typedef tTIO tRegisterMap; 01669 01670 enum { 01671 kOffset = 0xba, 01672 kId = 16 01673 }; 01674 tG1_DMA_Control(); 01675 01676 01677 typedef enum { 01678 kRegisterId = 0, 01679 kG1_DMA_EnableId = 1, 01680 kG1_DMA_Output_EnableId = 2, 01681 kG1_DMA_Int_EnableId = 3 01682 } tId; 01683 01684 inline tTIO* registerMap(void); 01685 01686 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01687 01688 // Register Accessors (Compile-time selectable) 01689 inline tG1_DMA_Control& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01690 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01691 01692 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01693 01694 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01695 01696 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01697 01698 // Field Accessors (Compile-time selectable) 01699 typedef enum { 01700 kG1_DMA_EnableRead = 0, 01701 kG1_DMA_EnableWrite = 1, 01702 } tG1_DMA_Enable; 01703 inline tG1_DMA_Control& setG1_DMA_Enable(tG1_DMA_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 01704 inline tG1_DMA_Enable getG1_DMA_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01705 01706 inline void writeG1_DMA_Enable(tG1_DMA_Enable fieldValue, nMDBG::tStatus2* statusChain = NULL); 01707 01708 inline tG1_DMA_Enable readG1_DMA_Enable(nMDBG::tStatus2* statusChain = NULL); 01709 01710 inline tG1_DMA_Control& setG1_DMA_Output_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01711 inline u16 getG1_DMA_Output_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01712 01713 inline void writeG1_DMA_Output_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01714 01715 inline u16 readG1_DMA_Output_Enable(nMDBG::tStatus2* statusChain = NULL); 01716 01717 inline tG1_DMA_Control& setG1_DMA_Int_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01718 inline u16 getG1_DMA_Int_Enable(nMDBG::tStatus2* statusChain = NULL) const; 01719 01720 inline void writeG1_DMA_Int_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01721 01722 inline u16 readG1_DMA_Int_Enable(nMDBG::tStatus2* statusChain = NULL); 01723 01724 // Run-time selectable Register/Field Accessors 01725 private: 01726 u16 _softCopy; 01727 01728 inline void setRegisterMap(tTIO* pTIO); 01729 tTIO* _TIO; 01730 01731 friend class tTIO; 01732 01733 }; 01734 01735 //--------------------------------------------------------------------------- 01736 // G1_Input_Select 01737 //--------------------------------------------------------------------------- 01738 class tG1_Input_Select : public tReg16IODirect32 01739 { 01740 public: 01741 typedef tReg16IODirect32 tIOStrategy; 01742 typedef tTIO tRegisterMap; 01743 01744 enum { 01745 kOffset = 0x4a, 01746 kId = 17 01747 }; 01748 tG1_Input_Select(); 01749 01750 01751 typedef enum { 01752 kRegisterId = 0, 01753 kG1_Read_Acknowledges_IrqId = 1, 01754 kG1_Write_Acknowledges_IrqId = 2, 01755 kG1_Source_SelectId = 3, 01756 kG1_Gate_SelectId = 4, 01757 kG1_Gate_Select_Load_SourceId = 5, 01758 kG1_OR_GateId = 6, 01759 kG1_Output_PolarityId = 7, 01760 kG1_Source_PolarityId = 8 01761 } tId; 01762 01763 inline tTIO* registerMap(void); 01764 01765 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01766 01767 // Register Accessors (Compile-time selectable) 01768 inline tG1_Input_Select& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01769 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01770 01771 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01772 01773 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01774 01775 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01776 01777 // Field Accessors (Compile-time selectable) 01778 inline tG1_Input_Select& setG1_Read_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01779 inline u16 getG1_Read_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL) const; 01780 01781 inline void writeG1_Read_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01782 01783 inline u16 readG1_Read_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL); 01784 01785 inline tG1_Input_Select& setG1_Write_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01786 inline u16 getG1_Write_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL) const; 01787 01788 inline void writeG1_Write_Acknowledges_Irq(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01789 01790 inline u16 readG1_Write_Acknowledges_Irq(nMDBG::tStatus2* statusChain = NULL); 01791 01792 inline tG1_Input_Select& setG1_Source_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01793 inline u16 getG1_Source_Select(nMDBG::tStatus2* statusChain = NULL) const; 01794 01795 inline void writeG1_Source_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01796 01797 inline u16 readG1_Source_Select(nMDBG::tStatus2* statusChain = NULL); 01798 01799 inline tG1_Input_Select& setG1_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01800 inline u16 getG1_Gate_Select(nMDBG::tStatus2* statusChain = NULL) const; 01801 01802 inline void writeG1_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01803 01804 inline u16 readG1_Gate_Select(nMDBG::tStatus2* statusChain = NULL); 01805 01806 inline tG1_Input_Select& setG1_Gate_Select_Load_Source(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01807 inline u16 getG1_Gate_Select_Load_Source(nMDBG::tStatus2* statusChain = NULL) const; 01808 01809 inline void writeG1_Gate_Select_Load_Source(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01810 01811 inline u16 readG1_Gate_Select_Load_Source(nMDBG::tStatus2* statusChain = NULL); 01812 01813 inline tG1_Input_Select& setG1_OR_Gate(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01814 inline u16 getG1_OR_Gate(nMDBG::tStatus2* statusChain = NULL) const; 01815 01816 inline void writeG1_OR_Gate(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01817 01818 inline u16 readG1_OR_Gate(nMDBG::tStatus2* statusChain = NULL); 01819 01820 inline tG1_Input_Select& setG1_Output_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01821 inline u16 getG1_Output_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 01822 01823 inline void writeG1_Output_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01824 01825 inline u16 readG1_Output_Polarity(nMDBG::tStatus2* statusChain = NULL); 01826 01827 inline tG1_Input_Select& setG1_Source_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01828 inline u16 getG1_Source_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 01829 01830 inline void writeG1_Source_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01831 01832 inline u16 readG1_Source_Polarity(nMDBG::tStatus2* statusChain = NULL); 01833 01834 // Run-time selectable Register/Field Accessors 01835 private: 01836 u16 _softCopy; 01837 01838 inline void setRegisterMap(tTIO* pTIO); 01839 tTIO* _TIO; 01840 01841 friend class tTIO; 01842 01843 }; 01844 01845 //--------------------------------------------------------------------------- 01846 // G1_Load_A 01847 //--------------------------------------------------------------------------- 01848 class tG1_Load_A : public tReg32IODirect32 01849 { 01850 public: 01851 typedef tReg32IODirect32 tIOStrategy; 01852 typedef tTIO tRegisterMap; 01853 01854 enum { 01855 kOffset = 0x40, 01856 kId = 18 01857 }; 01858 tG1_Load_A(); 01859 01860 01861 typedef enum { 01862 kRegisterId = 0, 01863 kDefaultId = 1 01864 } tId; 01865 01866 inline tTIO* registerMap(void); 01867 01868 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01869 01870 // Register Accessors (Compile-time selectable) 01871 inline tG1_Load_A& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 01872 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01873 01874 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01875 01876 inline void writeRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 01877 01878 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 01879 01880 // Field Accessors (Compile-time selectable) 01881 inline tG1_Load_A& set(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01882 inline u32 get(nMDBG::tStatus2* statusChain = NULL) const; 01883 01884 inline void write(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01885 01886 inline u32 read(nMDBG::tStatus2* statusChain = NULL); 01887 01888 // Run-time selectable Register/Field Accessors 01889 private: 01890 u32 _softCopy; 01891 01892 inline void setRegisterMap(tTIO* pTIO); 01893 tTIO* _TIO; 01894 01895 friend class tTIO; 01896 01897 }; 01898 01899 //--------------------------------------------------------------------------- 01900 // G1_Load_B 01901 //--------------------------------------------------------------------------- 01902 class tG1_Load_B : public tReg32IODirect32 01903 { 01904 public: 01905 typedef tReg32IODirect32 tIOStrategy; 01906 typedef tTIO tRegisterMap; 01907 01908 enum { 01909 kOffset = 0x44, 01910 kId = 19 01911 }; 01912 tG1_Load_B(); 01913 01914 01915 typedef enum { 01916 kRegisterId = 0, 01917 kDefaultId = 1 01918 } tId; 01919 01920 inline tTIO* registerMap(void); 01921 01922 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01923 01924 // Register Accessors (Compile-time selectable) 01925 inline tG1_Load_B& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 01926 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01927 01928 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01929 01930 inline void writeRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 01931 01932 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 01933 01934 // Field Accessors (Compile-time selectable) 01935 inline tG1_Load_B& set(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01936 inline u32 get(nMDBG::tStatus2* statusChain = NULL) const; 01937 01938 inline void write(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 01939 01940 inline u32 read(nMDBG::tStatus2* statusChain = NULL); 01941 01942 // Run-time selectable Register/Field Accessors 01943 private: 01944 u32 _softCopy; 01945 01946 inline void setRegisterMap(tTIO* pTIO); 01947 tTIO* _TIO; 01948 01949 friend class tTIO; 01950 01951 }; 01952 01953 //--------------------------------------------------------------------------- 01954 // G1_Mode 01955 //--------------------------------------------------------------------------- 01956 class tG1_Mode : public tReg16IODirect32 01957 { 01958 public: 01959 typedef tReg16IODirect32 tIOStrategy; 01960 typedef tTIO tRegisterMap; 01961 01962 enum { 01963 kOffset = 0x36, 01964 kId = 20 01965 }; 01966 tG1_Mode(); 01967 01968 01969 typedef enum { 01970 kRegisterId = 0, 01971 kG1_Gating_ModeId = 1, 01972 kG1_Gate_On_Both_EdgesId = 2, 01973 kG1_Trigger_Mode_For_Edge_GateId = 3, 01974 kG1_Stop_ModeId = 4, 01975 kG1_Load_Source_SelectId = 5, 01976 kG1_Output_ModeId = 6, 01977 kG1_Counting_OnceId = 7, 01978 kG1_Loading_On_TCId = 8, 01979 kG1_Gate_PolarityId = 9, 01980 kG1_Loading_On_GateId = 10, 01981 kG1_Reload_Source_SwitchingId = 11 01982 } tId; 01983 01984 inline tTIO* registerMap(void); 01985 01986 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 01987 01988 // Register Accessors (Compile-time selectable) 01989 inline tG1_Mode& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01990 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 01991 01992 inline void flush(nMDBG::tStatus2* statusChain = NULL); 01993 01994 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 01995 01996 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 01997 01998 // Field Accessors (Compile-time selectable) 01999 typedef enum { 02000 kG1_Gating_ModeGating_Disabled = 0, 02001 kG1_Gating_ModeLevel_Gating = 1, 02002 kG1_Gating_ModeEdge_Gating_Active_High = 2, 02003 kG1_Gating_ModeEdge_Gating_Active_Low = 3, 02004 } tG1_Gating_Mode; 02005 inline tG1_Mode& setG1_Gating_Mode(tG1_Gating_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02006 inline tG1_Gating_Mode getG1_Gating_Mode(nMDBG::tStatus2* statusChain = NULL) const; 02007 02008 inline void writeG1_Gating_Mode(tG1_Gating_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02009 02010 inline tG1_Gating_Mode readG1_Gating_Mode(nMDBG::tStatus2* statusChain = NULL); 02011 02012 typedef enum { 02013 kG1_Gate_On_Both_EdgesBoth_Edges_Disabled = 0, 02014 kG1_Gate_On_Both_EdgesBoth_Edges_Enabled = 1, 02015 } tG1_Gate_On_Both_Edges; 02016 inline tG1_Mode& setG1_Gate_On_Both_Edges(tG1_Gate_On_Both_Edges fieldValue, nMDBG::tStatus2* statusChain = NULL); 02017 inline tG1_Gate_On_Both_Edges getG1_Gate_On_Both_Edges(nMDBG::tStatus2* statusChain = NULL) const; 02018 02019 inline void writeG1_Gate_On_Both_Edges(tG1_Gate_On_Both_Edges fieldValue, nMDBG::tStatus2* statusChain = NULL); 02020 02021 inline tG1_Gate_On_Both_Edges readG1_Gate_On_Both_Edges(nMDBG::tStatus2* statusChain = NULL); 02022 02023 typedef enum { 02024 kG1_Trigger_Mode_For_Edge_GateFirst_Starts_Next_Stops = 0, 02025 kG1_Trigger_Mode_For_Edge_GateFirst_Starts_Next_Starts = 1, 02026 kG1_Trigger_Mode_For_Edge_GateGate_Starts_TC_Stops = 2, 02027 kG1_Trigger_Mode_For_Edge_GateGate_Does_Not_Stop = 3, 02028 } tG1_Trigger_Mode_For_Edge_Gate; 02029 inline tG1_Mode& setG1_Trigger_Mode_For_Edge_Gate(tG1_Trigger_Mode_For_Edge_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 02030 inline tG1_Trigger_Mode_For_Edge_Gate getG1_Trigger_Mode_For_Edge_Gate(nMDBG::tStatus2* statusChain = NULL) const; 02031 02032 inline void writeG1_Trigger_Mode_For_Edge_Gate(tG1_Trigger_Mode_For_Edge_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 02033 02034 inline tG1_Trigger_Mode_For_Edge_Gate readG1_Trigger_Mode_For_Edge_Gate(nMDBG::tStatus2* statusChain = NULL); 02035 02036 typedef enum { 02037 kG1_Stop_ModeStop_On_Gate = 0, 02038 kG1_Stop_ModeStop_On_Gate_Or_First_TC = 1, 02039 kG1_Stop_ModeStop_On_Gate_Or_Second_TC = 2, 02040 kG1_Stop_ModeStop_Mode_Reserved = 3, 02041 } tG1_Stop_Mode; 02042 inline tG1_Mode& setG1_Stop_Mode(tG1_Stop_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02043 inline tG1_Stop_Mode getG1_Stop_Mode(nMDBG::tStatus2* statusChain = NULL) const; 02044 02045 inline void writeG1_Stop_Mode(tG1_Stop_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02046 02047 inline tG1_Stop_Mode readG1_Stop_Mode(nMDBG::tStatus2* statusChain = NULL); 02048 02049 typedef enum { 02050 kG1_Load_Source_SelectLoad_A = 0, 02051 kG1_Load_Source_SelectLoad_B = 1, 02052 } tG1_Load_Source_Select; 02053 inline tG1_Mode& setG1_Load_Source_Select(tG1_Load_Source_Select fieldValue, nMDBG::tStatus2* statusChain = NULL); 02054 inline tG1_Load_Source_Select getG1_Load_Source_Select(nMDBG::tStatus2* statusChain = NULL) const; 02055 02056 inline void writeG1_Load_Source_Select(tG1_Load_Source_Select fieldValue, nMDBG::tStatus2* statusChain = NULL); 02057 02058 inline tG1_Load_Source_Select readG1_Load_Source_Select(nMDBG::tStatus2* statusChain = NULL); 02059 02060 typedef enum { 02061 kG1_Output_ModeReserved = 0, 02062 kG1_Output_ModePulse = 1, 02063 kG1_Output_ModeToggle = 2, 02064 kG1_Output_ModeToggle_On_TC_Or_Gate = 3, 02065 } tG1_Output_Mode; 02066 inline tG1_Mode& setG1_Output_Mode(tG1_Output_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02067 inline tG1_Output_Mode getG1_Output_Mode(nMDBG::tStatus2* statusChain = NULL) const; 02068 02069 inline void writeG1_Output_Mode(tG1_Output_Mode fieldValue, nMDBG::tStatus2* statusChain = NULL); 02070 02071 inline tG1_Output_Mode readG1_Output_Mode(nMDBG::tStatus2* statusChain = NULL); 02072 02073 typedef enum { 02074 kG1_Counting_OnceNo_HW_Disarm = 0, 02075 kG1_Counting_OnceDisarm_On_TC = 1, 02076 kG1_Counting_OnceDisarm_On_Gate = 2, 02077 kG1_Counting_OnceDisarm_On_Gate_Or_TC = 3, 02078 } tG1_Counting_Once; 02079 inline tG1_Mode& setG1_Counting_Once(tG1_Counting_Once fieldValue, nMDBG::tStatus2* statusChain = NULL); 02080 inline tG1_Counting_Once getG1_Counting_Once(nMDBG::tStatus2* statusChain = NULL) const; 02081 02082 inline void writeG1_Counting_Once(tG1_Counting_Once fieldValue, nMDBG::tStatus2* statusChain = NULL); 02083 02084 inline tG1_Counting_Once readG1_Counting_Once(nMDBG::tStatus2* statusChain = NULL); 02085 02086 typedef enum { 02087 kG1_Loading_On_TCRollover_On_TC = 0, 02088 kG1_Loading_On_TCReload_On_TC = 1, 02089 } tG1_Loading_On_TC; 02090 inline tG1_Mode& setG1_Loading_On_TC(tG1_Loading_On_TC fieldValue, nMDBG::tStatus2* statusChain = NULL); 02091 inline tG1_Loading_On_TC getG1_Loading_On_TC(nMDBG::tStatus2* statusChain = NULL) const; 02092 02093 inline void writeG1_Loading_On_TC(tG1_Loading_On_TC fieldValue, nMDBG::tStatus2* statusChain = NULL); 02094 02095 inline tG1_Loading_On_TC readG1_Loading_On_TC(nMDBG::tStatus2* statusChain = NULL); 02096 02097 inline tG1_Mode& setG1_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02098 inline u16 getG1_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 02099 02100 inline void writeG1_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02101 02102 inline u16 readG1_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL); 02103 02104 typedef enum { 02105 kG1_Loading_On_GateNo_Reload = 0, 02106 kG1_Loading_On_GateReload_On_Stop_Gate = 1, 02107 } tG1_Loading_On_Gate; 02108 inline tG1_Mode& setG1_Loading_On_Gate(tG1_Loading_On_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 02109 inline tG1_Loading_On_Gate getG1_Loading_On_Gate(nMDBG::tStatus2* statusChain = NULL) const; 02110 02111 inline void writeG1_Loading_On_Gate(tG1_Loading_On_Gate fieldValue, nMDBG::tStatus2* statusChain = NULL); 02112 02113 inline tG1_Loading_On_Gate readG1_Loading_On_Gate(nMDBG::tStatus2* statusChain = NULL); 02114 02115 typedef enum { 02116 kG1_Reload_Source_SwitchingUse_Same = 0, 02117 kG1_Reload_Source_SwitchingAlternate = 1, 02118 } tG1_Reload_Source_Switching; 02119 inline tG1_Mode& setG1_Reload_Source_Switching(tG1_Reload_Source_Switching fieldValue, nMDBG::tStatus2* statusChain = NULL); 02120 inline tG1_Reload_Source_Switching getG1_Reload_Source_Switching(nMDBG::tStatus2* statusChain = NULL) const; 02121 02122 inline void writeG1_Reload_Source_Switching(tG1_Reload_Source_Switching fieldValue, nMDBG::tStatus2* statusChain = NULL); 02123 02124 inline tG1_Reload_Source_Switching readG1_Reload_Source_Switching(nMDBG::tStatus2* statusChain = NULL); 02125 02126 // Run-time selectable Register/Field Accessors 02127 private: 02128 u16 _softCopy; 02129 02130 inline void setRegisterMap(tTIO* pTIO); 02131 tTIO* _TIO; 02132 02133 friend class tTIO; 02134 02135 }; 02136 02137 //--------------------------------------------------------------------------- 02138 // G1_Second_Gate 02139 //--------------------------------------------------------------------------- 02140 class tG1_Second_Gate : public tReg16IODirect32 02141 { 02142 public: 02143 typedef tReg16IODirect32 tIOStrategy; 02144 typedef tTIO tRegisterMap; 02145 02146 enum { 02147 kOffset = 0xb6, 02148 kId = 21 02149 }; 02150 tG1_Second_Gate(); 02151 02152 02153 typedef enum { 02154 kRegisterId = 0, 02155 kG1_Second_Gate_Gating_ModeId = 1, 02156 kG1_Second_Gate_SelectId = 3, 02157 kG1_Second_Gate_PolarityId = 5, 02158 kG1_MSeries_Second_Gate_SubSelectId = 6, 02159 kG1_MSeries_Source_SubSelectId = 7 02160 } tId; 02161 02162 inline tTIO* registerMap(void); 02163 02164 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02165 02166 // Register Accessors (Compile-time selectable) 02167 inline tG1_Second_Gate& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02168 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02169 02170 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02171 02172 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02173 02174 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02175 02176 // Field Accessors (Compile-time selectable) 02177 inline tG1_Second_Gate& setG1_Second_Gate_Gating_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02178 inline u16 getG1_Second_Gate_Gating_Mode(nMDBG::tStatus2* statusChain = NULL) const; 02179 02180 inline void writeG1_Second_Gate_Gating_Mode(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02181 02182 inline u16 readG1_Second_Gate_Gating_Mode(nMDBG::tStatus2* statusChain = NULL); 02183 02184 inline tG1_Second_Gate& setG1_Second_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02185 inline u16 getG1_Second_Gate_Select(nMDBG::tStatus2* statusChain = NULL) const; 02186 02187 inline void writeG1_Second_Gate_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02188 02189 inline u16 readG1_Second_Gate_Select(nMDBG::tStatus2* statusChain = NULL); 02190 02191 inline tG1_Second_Gate& setG1_Second_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02192 inline u16 getG1_Second_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL) const; 02193 02194 inline void writeG1_Second_Gate_Polarity(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02195 02196 inline u16 readG1_Second_Gate_Polarity(nMDBG::tStatus2* statusChain = NULL); 02197 02198 inline tG1_Second_Gate& setG1_MSeries_Second_Gate_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02199 inline u16 getG1_MSeries_Second_Gate_SubSelect(nMDBG::tStatus2* statusChain = NULL) const; 02200 02201 inline void writeG1_MSeries_Second_Gate_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02202 02203 inline u16 readG1_MSeries_Second_Gate_SubSelect(nMDBG::tStatus2* statusChain = NULL); 02204 02205 inline tG1_Second_Gate& setG1_MSeries_Source_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02206 inline u16 getG1_MSeries_Source_SubSelect(nMDBG::tStatus2* statusChain = NULL) const; 02207 02208 inline void writeG1_MSeries_Source_SubSelect(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02209 02210 inline u16 readG1_MSeries_Source_SubSelect(nMDBG::tStatus2* statusChain = NULL); 02211 02212 // Run-time selectable Register/Field Accessors 02213 private: 02214 u16 _softCopy; 02215 02216 inline void setRegisterMap(tTIO* pTIO); 02217 tTIO* _TIO; 02218 02219 friend class tTIO; 02220 02221 }; 02222 02223 //--------------------------------------------------------------------------- 02224 // G1_MSeries_ABZ 02225 //--------------------------------------------------------------------------- 02226 class tG1_MSeries_ABZ : public tReg16IODirect32 02227 { 02228 public: 02229 typedef tReg16IODirect32 tIOStrategy; 02230 typedef tTIO tRegisterMap; 02231 02232 enum { 02233 kOffset = 0xc2, 02234 kId = 22 02235 }; 02236 tG1_MSeries_ABZ(); 02237 02238 02239 typedef enum { 02240 kRegisterId = 0, 02241 kG1_Z_SelectId = 1, 02242 kG1_B_SelectId = 2, 02243 kG1_A_SelectId = 3 02244 } tId; 02245 02246 inline tTIO* registerMap(void); 02247 02248 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02249 02250 // Register Accessors (Compile-time selectable) 02251 inline tG1_MSeries_ABZ& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02252 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02253 02254 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02255 02256 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02257 02258 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02259 02260 // Field Accessors (Compile-time selectable) 02261 inline tG1_MSeries_ABZ& setG1_Z_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02262 inline u16 getG1_Z_Select(nMDBG::tStatus2* statusChain = NULL) const; 02263 02264 inline void writeG1_Z_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02265 02266 inline u16 readG1_Z_Select(nMDBG::tStatus2* statusChain = NULL); 02267 02268 inline tG1_MSeries_ABZ& setG1_B_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02269 inline u16 getG1_B_Select(nMDBG::tStatus2* statusChain = NULL) const; 02270 02271 inline void writeG1_B_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02272 02273 inline u16 readG1_B_Select(nMDBG::tStatus2* statusChain = NULL); 02274 02275 inline tG1_MSeries_ABZ& setG1_A_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02276 inline u16 getG1_A_Select(nMDBG::tStatus2* statusChain = NULL) const; 02277 02278 inline void writeG1_A_Select(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02279 02280 inline u16 readG1_A_Select(nMDBG::tStatus2* statusChain = NULL); 02281 02282 // Run-time selectable Register/Field Accessors 02283 private: 02284 u16 _softCopy; 02285 02286 inline void setRegisterMap(tTIO* pTIO); 02287 tTIO* _TIO; 02288 02289 friend class tTIO; 02290 02291 }; 02292 02293 //--------------------------------------------------------------------------- 02294 // Interrupt_G0_Ack 02295 //--------------------------------------------------------------------------- 02296 class tInterrupt_G0_Ack : public tReg16IODirect32 02297 { 02298 public: 02299 typedef tReg16IODirect32 tIOStrategy; 02300 typedef tTIO tRegisterMap; 02301 02302 enum { 02303 kOffset = 0x4, 02304 kId = 23 02305 }; 02306 tInterrupt_G0_Ack(); 02307 02308 02309 typedef enum { 02310 kRegisterId = 0, 02311 kG0_Gate_Error_ConfirmId = 2, 02312 kG0_TC_Error_ConfirmId = 3, 02313 kG0_TC_Interrupt_AckId = 5, 02314 kG0_Gate_Interrupt_AckId = 6 02315 } tId; 02316 02317 inline tTIO* registerMap(void); 02318 02319 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02320 02321 // Register Accessors (Compile-time selectable) 02322 inline tInterrupt_G0_Ack& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02323 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02324 02325 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02326 02327 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02328 02329 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02330 02331 // Field Accessors (Compile-time selectable) 02332 inline tInterrupt_G0_Ack& setG0_Gate_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02333 inline u16 getG0_Gate_Error_Confirm(nMDBG::tStatus2* statusChain = NULL) const; 02334 02335 inline void writeG0_Gate_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02336 02337 inline u16 readG0_Gate_Error_Confirm(nMDBG::tStatus2* statusChain = NULL); 02338 02339 inline tInterrupt_G0_Ack& setG0_TC_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02340 inline u16 getG0_TC_Error_Confirm(nMDBG::tStatus2* statusChain = NULL) const; 02341 02342 inline void writeG0_TC_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02343 02344 inline u16 readG0_TC_Error_Confirm(nMDBG::tStatus2* statusChain = NULL); 02345 02346 inline tInterrupt_G0_Ack& setG0_TC_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02347 inline u16 getG0_TC_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL) const; 02348 02349 inline void writeG0_TC_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02350 02351 inline u16 readG0_TC_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL); 02352 02353 inline tInterrupt_G0_Ack& setG0_Gate_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02354 inline u16 getG0_Gate_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL) const; 02355 02356 inline void writeG0_Gate_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02357 02358 inline u16 readG0_Gate_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL); 02359 02360 // Run-time selectable Register/Field Accessors 02361 private: 02362 u16 _softCopy; 02363 02364 inline void setRegisterMap(tTIO* pTIO); 02365 tTIO* _TIO; 02366 02367 friend class tTIO; 02368 02369 }; 02370 02371 //--------------------------------------------------------------------------- 02372 // Interrupt_G0_Enable 02373 //--------------------------------------------------------------------------- 02374 class tInterrupt_G0_Enable : public tReg16IODirect32 02375 { 02376 public: 02377 typedef tReg16IODirect32 tIOStrategy; 02378 typedef tTIO tRegisterMap; 02379 02380 enum { 02381 kOffset = 0x92, 02382 kId = 24 02383 }; 02384 tInterrupt_G0_Enable(); 02385 02386 02387 typedef enum { 02388 kRegisterId = 0, 02389 kG0_TC_Interrupt_EnableId = 2, 02390 kG0_Gate_Interrupt_EnableId = 4 02391 } tId; 02392 02393 inline tTIO* registerMap(void); 02394 02395 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02396 02397 // Register Accessors (Compile-time selectable) 02398 inline tInterrupt_G0_Enable& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02399 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02400 02401 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02402 02403 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02404 02405 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02406 02407 // Field Accessors (Compile-time selectable) 02408 inline tInterrupt_G0_Enable& setG0_TC_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02409 inline u16 getG0_TC_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL) const; 02410 02411 inline void writeG0_TC_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02412 02413 inline u16 readG0_TC_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL); 02414 02415 inline tInterrupt_G0_Enable& setG0_Gate_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02416 inline u16 getG0_Gate_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL) const; 02417 02418 inline void writeG0_Gate_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02419 02420 inline u16 readG0_Gate_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL); 02421 02422 // Run-time selectable Register/Field Accessors 02423 private: 02424 u16 _softCopy; 02425 02426 inline void setRegisterMap(tTIO* pTIO); 02427 tTIO* _TIO; 02428 02429 friend class tTIO; 02430 02431 }; 02432 02433 //--------------------------------------------------------------------------- 02434 // Interrupt_G1_Ack 02435 //--------------------------------------------------------------------------- 02436 class tInterrupt_G1_Ack : public tReg16IODirect32 02437 { 02438 public: 02439 typedef tReg16IODirect32 tIOStrategy; 02440 typedef tTIO tRegisterMap; 02441 02442 enum { 02443 kOffset = 0x6, 02444 kId = 25 02445 }; 02446 tInterrupt_G1_Ack(); 02447 02448 02449 typedef enum { 02450 kRegisterId = 0, 02451 kG1_Gate_Error_ConfirmId = 2, 02452 kG1_TC_Error_ConfirmId = 3, 02453 kG1_TC_Interrupt_AckId = 5, 02454 kG1_Gate_Interrupt_AckId = 6 02455 } tId; 02456 02457 inline tTIO* registerMap(void); 02458 02459 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02460 02461 // Register Accessors (Compile-time selectable) 02462 inline tInterrupt_G1_Ack& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02463 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02464 02465 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02466 02467 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02468 02469 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02470 02471 // Field Accessors (Compile-time selectable) 02472 inline tInterrupt_G1_Ack& setG1_Gate_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02473 inline u16 getG1_Gate_Error_Confirm(nMDBG::tStatus2* statusChain = NULL) const; 02474 02475 inline void writeG1_Gate_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02476 02477 inline u16 readG1_Gate_Error_Confirm(nMDBG::tStatus2* statusChain = NULL); 02478 02479 inline tInterrupt_G1_Ack& setG1_TC_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02480 inline u16 getG1_TC_Error_Confirm(nMDBG::tStatus2* statusChain = NULL) const; 02481 02482 inline void writeG1_TC_Error_Confirm(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02483 02484 inline u16 readG1_TC_Error_Confirm(nMDBG::tStatus2* statusChain = NULL); 02485 02486 inline tInterrupt_G1_Ack& setG1_TC_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02487 inline u16 getG1_TC_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL) const; 02488 02489 inline void writeG1_TC_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02490 02491 inline u16 readG1_TC_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL); 02492 02493 inline tInterrupt_G1_Ack& setG1_Gate_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02494 inline u16 getG1_Gate_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL) const; 02495 02496 inline void writeG1_Gate_Interrupt_Ack(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02497 02498 inline u16 readG1_Gate_Interrupt_Ack(nMDBG::tStatus2* statusChain = NULL); 02499 02500 // Run-time selectable Register/Field Accessors 02501 private: 02502 u16 _softCopy; 02503 02504 inline void setRegisterMap(tTIO* pTIO); 02505 tTIO* _TIO; 02506 02507 friend class tTIO; 02508 02509 }; 02510 02511 //--------------------------------------------------------------------------- 02512 // Interrupt_G1_Enable 02513 //--------------------------------------------------------------------------- 02514 class tInterrupt_G1_Enable : public tReg16IODirect32 02515 { 02516 public: 02517 typedef tReg16IODirect32 tIOStrategy; 02518 typedef tTIO tRegisterMap; 02519 02520 enum { 02521 kOffset = 0x96, 02522 kId = 26 02523 }; 02524 tInterrupt_G1_Enable(); 02525 02526 02527 typedef enum { 02528 kRegisterId = 0, 02529 kG1_TC_Interrupt_EnableId = 2, 02530 kG1_Gate_Interrupt_EnableId = 3 02531 } tId; 02532 02533 inline tTIO* registerMap(void); 02534 02535 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 02536 02537 // Register Accessors (Compile-time selectable) 02538 inline tInterrupt_G1_Enable& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02539 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02540 02541 inline void flush(nMDBG::tStatus2* statusChain = NULL); 02542 02543 inline void writeRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02544 02545 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02546 02547 // Field Accessors (Compile-time selectable) 02548 inline tInterrupt_G1_Enable& setG1_TC_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02549 inline u16 getG1_TC_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL) const; 02550 02551 inline void writeG1_TC_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02552 02553 inline u16 readG1_TC_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL); 02554 02555 inline tInterrupt_G1_Enable& setG1_Gate_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02556 inline u16 getG1_Gate_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL) const; 02557 02558 inline void writeG1_Gate_Interrupt_Enable(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02559 02560 inline u16 readG1_Gate_Interrupt_Enable(nMDBG::tStatus2* statusChain = NULL); 02561 02562 // Run-time selectable Register/Field Accessors 02563 private: 02564 u16 _softCopy; 02565 02566 inline void setRegisterMap(tTIO* pTIO); 02567 tTIO* _TIO; 02568 02569 friend class tTIO; 02570 02571 }; 02572 02573 //--------------------------------------------------------------------------- 02574 // G0_DMA_Status 02575 //--------------------------------------------------------------------------- 02576 class tG0_DMA_Status : public tReg16IODirect32 02577 { 02578 public: 02579 typedef tReg16IODirect32 tIOStrategy; 02580 typedef tTIO tRegisterMap; 02581 02582 enum { 02583 kOffset = 0xb8, 02584 kId = 27 02585 }; 02586 tG0_DMA_Status(); 02587 02588 02589 typedef enum { 02590 kRegisterId = 0, 02591 kG0_DMA_Read_ValueId = 2, 02592 kG0_DMA_Error_StId = 3, 02593 kG0_DRQ_StId = 4 02594 } tId; 02595 02596 inline tTIO* registerMap(void); 02597 02598 // Register Accessors (Compile-time selectable) 02599 inline tG0_DMA_Status& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02600 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02601 02602 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02603 02604 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02605 02606 // Field Accessors (Compile-time selectable) 02607 inline tG0_DMA_Status& setG0_DMA_Read_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02608 inline u16 getG0_DMA_Read_Value(nMDBG::tStatus2* statusChain = NULL) const; 02609 02610 inline u16 readG0_DMA_Read_Value(nMDBG::tStatus2* statusChain = NULL); 02611 02612 inline tG0_DMA_Status& setG0_DMA_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02613 inline u16 getG0_DMA_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 02614 02615 inline u16 readG0_DMA_Error_St(nMDBG::tStatus2* statusChain = NULL); 02616 02617 inline tG0_DMA_Status& setG0_DRQ_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02618 inline u16 getG0_DRQ_St(nMDBG::tStatus2* statusChain = NULL) const; 02619 02620 inline u16 readG0_DRQ_St(nMDBG::tStatus2* statusChain = NULL); 02621 02622 // Run-time selectable Register/Field Accessors 02623 private: 02624 u16 _softCopy; 02625 02626 inline void setRegisterMap(tTIO* pTIO); 02627 tTIO* _TIO; 02628 02629 friend class tTIO; 02630 02631 }; 02632 02633 //--------------------------------------------------------------------------- 02634 // G0_HW_Save 02635 //--------------------------------------------------------------------------- 02636 class tG0_HW_Save : public tReg32IODirect32 02637 { 02638 public: 02639 typedef tReg32IODirect32 tIOStrategy; 02640 typedef tTIO tRegisterMap; 02641 02642 enum { 02643 kOffset = 0x10, 02644 kId = 28 02645 }; 02646 tG0_HW_Save(); 02647 02648 02649 typedef enum { 02650 kRegisterId = 0, 02651 kG0_HW_Save_ValueId = 1 02652 } tId; 02653 02654 inline tTIO* registerMap(void); 02655 02656 // Register Accessors (Compile-time selectable) 02657 inline tG0_HW_Save& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 02658 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02659 02660 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02661 02662 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 02663 02664 // Field Accessors (Compile-time selectable) 02665 inline tG0_HW_Save& setG0_HW_Save_Value(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02666 inline u32 getG0_HW_Save_Value(nMDBG::tStatus2* statusChain = NULL) const; 02667 02668 inline u32 readG0_HW_Save_Value(nMDBG::tStatus2* statusChain = NULL); 02669 02670 // Run-time selectable Register/Field Accessors 02671 private: 02672 u32 _softCopy; 02673 02674 inline void setRegisterMap(tTIO* pTIO); 02675 tTIO* _TIO; 02676 02677 friend class tTIO; 02678 02679 }; 02680 02681 //--------------------------------------------------------------------------- 02682 // G0_HW_Save_High 02683 //--------------------------------------------------------------------------- 02684 class tG0_HW_Save_High : public tReg16IODirect32 02685 { 02686 public: 02687 typedef tReg16IODirect32 tIOStrategy; 02688 typedef tTIO tRegisterMap; 02689 02690 enum { 02691 kOffset = 0x10, 02692 kId = 29 02693 }; 02694 tG0_HW_Save_High(); 02695 02696 02697 typedef enum { 02698 kRegisterId = 0, 02699 kG0_HW_Save_High_ValueId = 1 02700 } tId; 02701 02702 inline tTIO* registerMap(void); 02703 02704 // Register Accessors (Compile-time selectable) 02705 inline tG0_HW_Save_High& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02706 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02707 02708 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02709 02710 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02711 02712 // Field Accessors (Compile-time selectable) 02713 inline tG0_HW_Save_High& setG0_HW_Save_High_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02714 inline u16 getG0_HW_Save_High_Value(nMDBG::tStatus2* statusChain = NULL) const; 02715 02716 inline u16 readG0_HW_Save_High_Value(nMDBG::tStatus2* statusChain = NULL); 02717 02718 // Run-time selectable Register/Field Accessors 02719 private: 02720 u16 _softCopy; 02721 02722 inline void setRegisterMap(tTIO* pTIO); 02723 tTIO* _TIO; 02724 02725 friend class tTIO; 02726 02727 }; 02728 02729 //--------------------------------------------------------------------------- 02730 // G0_HW_Save_Low 02731 //--------------------------------------------------------------------------- 02732 class tG0_HW_Save_Low : public tReg16IODirect32 02733 { 02734 public: 02735 typedef tReg16IODirect32 tIOStrategy; 02736 typedef tTIO tRegisterMap; 02737 02738 enum { 02739 kOffset = 0x12, 02740 kId = 30 02741 }; 02742 tG0_HW_Save_Low(); 02743 02744 02745 typedef enum { 02746 kRegisterId = 0, 02747 kG0_HW_Save_Low_ValueId = 1 02748 } tId; 02749 02750 inline tTIO* registerMap(void); 02751 02752 // Register Accessors (Compile-time selectable) 02753 inline tG0_HW_Save_Low& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02754 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02755 02756 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02757 02758 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02759 02760 // Field Accessors (Compile-time selectable) 02761 inline tG0_HW_Save_Low& setG0_HW_Save_Low_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02762 inline u16 getG0_HW_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL) const; 02763 02764 inline u16 readG0_HW_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL); 02765 02766 // Run-time selectable Register/Field Accessors 02767 private: 02768 u16 _softCopy; 02769 02770 inline void setRegisterMap(tTIO* pTIO); 02771 tTIO* _TIO; 02772 02773 friend class tTIO; 02774 02775 }; 02776 02777 //--------------------------------------------------------------------------- 02778 // G0_Save 02779 //--------------------------------------------------------------------------- 02780 class tG0_Save : public tReg32IODirect32 02781 { 02782 public: 02783 typedef tReg32IODirect32 tIOStrategy; 02784 typedef tTIO tRegisterMap; 02785 02786 enum { 02787 kOffset = 0x18, 02788 kId = 31 02789 }; 02790 tG0_Save(); 02791 02792 02793 typedef enum { 02794 kRegisterId = 0, 02795 kG0_Save_ValueId = 1 02796 } tId; 02797 02798 inline tTIO* registerMap(void); 02799 02800 // Register Accessors (Compile-time selectable) 02801 inline tG0_Save& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 02802 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02803 02804 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02805 02806 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 02807 02808 // Field Accessors (Compile-time selectable) 02809 inline tG0_Save& setG0_Save_Value(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02810 inline u32 getG0_Save_Value(nMDBG::tStatus2* statusChain = NULL) const; 02811 02812 inline u32 readG0_Save_Value(nMDBG::tStatus2* statusChain = NULL); 02813 02814 // Run-time selectable Register/Field Accessors 02815 private: 02816 u32 _softCopy; 02817 02818 inline void setRegisterMap(tTIO* pTIO); 02819 tTIO* _TIO; 02820 02821 friend class tTIO; 02822 02823 }; 02824 02825 //--------------------------------------------------------------------------- 02826 // G0_Save_High 02827 //--------------------------------------------------------------------------- 02828 class tG0_Save_High : public tReg16IODirect32 02829 { 02830 public: 02831 typedef tReg16IODirect32 tIOStrategy; 02832 typedef tTIO tRegisterMap; 02833 02834 enum { 02835 kOffset = 0x18, 02836 kId = 32 02837 }; 02838 tG0_Save_High(); 02839 02840 02841 typedef enum { 02842 kRegisterId = 0, 02843 kG0_Save_High_ValueId = 1 02844 } tId; 02845 02846 inline tTIO* registerMap(void); 02847 02848 // Register Accessors (Compile-time selectable) 02849 inline tG0_Save_High& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02850 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02851 02852 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02853 02854 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02855 02856 // Field Accessors (Compile-time selectable) 02857 inline tG0_Save_High& setG0_Save_High_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02858 inline u16 getG0_Save_High_Value(nMDBG::tStatus2* statusChain = NULL) const; 02859 02860 inline u16 readG0_Save_High_Value(nMDBG::tStatus2* statusChain = NULL); 02861 02862 // Run-time selectable Register/Field Accessors 02863 private: 02864 u16 _softCopy; 02865 02866 inline void setRegisterMap(tTIO* pTIO); 02867 tTIO* _TIO; 02868 02869 friend class tTIO; 02870 02871 }; 02872 02873 //--------------------------------------------------------------------------- 02874 // G0_Save_Low 02875 //--------------------------------------------------------------------------- 02876 class tG0_Save_Low : public tReg16IODirect32 02877 { 02878 public: 02879 typedef tReg16IODirect32 tIOStrategy; 02880 typedef tTIO tRegisterMap; 02881 02882 enum { 02883 kOffset = 0x1a, 02884 kId = 33 02885 }; 02886 tG0_Save_Low(); 02887 02888 02889 typedef enum { 02890 kRegisterId = 0, 02891 kG0_Save_Low_ValueId = 1 02892 } tId; 02893 02894 inline tTIO* registerMap(void); 02895 02896 // Register Accessors (Compile-time selectable) 02897 inline tG0_Save_Low& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02898 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02899 02900 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02901 02902 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02903 02904 // Field Accessors (Compile-time selectable) 02905 inline tG0_Save_Low& setG0_Save_Low_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02906 inline u16 getG0_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL) const; 02907 02908 inline u16 readG0_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL); 02909 02910 // Run-time selectable Register/Field Accessors 02911 private: 02912 u16 _softCopy; 02913 02914 inline void setRegisterMap(tTIO* pTIO); 02915 tTIO* _TIO; 02916 02917 friend class tTIO; 02918 02919 }; 02920 02921 //--------------------------------------------------------------------------- 02922 // G0_Status_1 02923 //--------------------------------------------------------------------------- 02924 class tG0_Status_1 : public tReg16IODirect32 02925 { 02926 public: 02927 typedef tReg16IODirect32 tIOStrategy; 02928 typedef tTIO tRegisterMap; 02929 02930 enum { 02931 kOffset = 0x4, 02932 kId = 34 02933 }; 02934 tG0_Status_1(); 02935 02936 02937 typedef enum { 02938 kRegisterId = 0, 02939 kG0_Gate_Interrupt_StId = 2, 02940 kG0_TC_StId = 3, 02941 kG0_Interrupt_StId = 5 02942 } tId; 02943 02944 inline tTIO* registerMap(void); 02945 02946 // Register Accessors (Compile-time selectable) 02947 inline tG0_Status_1& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 02948 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 02949 02950 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 02951 02952 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 02953 02954 // Field Accessors (Compile-time selectable) 02955 inline tG0_Status_1& setG0_Gate_Interrupt_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02956 inline u16 getG0_Gate_Interrupt_St(nMDBG::tStatus2* statusChain = NULL) const; 02957 02958 inline u16 readG0_Gate_Interrupt_St(nMDBG::tStatus2* statusChain = NULL); 02959 02960 inline tG0_Status_1& setG0_TC_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02961 inline u16 getG0_TC_St(nMDBG::tStatus2* statusChain = NULL) const; 02962 02963 inline u16 readG0_TC_St(nMDBG::tStatus2* statusChain = NULL); 02964 02965 inline tG0_Status_1& setG0_Interrupt_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 02966 inline u16 getG0_Interrupt_St(nMDBG::tStatus2* statusChain = NULL) const; 02967 02968 inline u16 readG0_Interrupt_St(nMDBG::tStatus2* statusChain = NULL); 02969 02970 // Run-time selectable Register/Field Accessors 02971 private: 02972 u16 _softCopy; 02973 02974 inline void setRegisterMap(tTIO* pTIO); 02975 tTIO* _TIO; 02976 02977 friend class tTIO; 02978 02979 }; 02980 02981 //--------------------------------------------------------------------------- 02982 // G01_Joint_Status_1 02983 //--------------------------------------------------------------------------- 02984 class tG01_Joint_Status_1 : public tReg16IODirect32 02985 { 02986 public: 02987 typedef tReg16IODirect32 tIOStrategy; 02988 typedef tTIO tRegisterMap; 02989 02990 enum { 02991 kOffset = 0x36, 02992 kId = 35 02993 }; 02994 tG01_Joint_Status_1(); 02995 02996 02997 typedef enum { 02998 kRegisterId = 0, 02999 kG0_Bank_StId = 1, 03000 kG1_Bank_StId = 2, 03001 kG0_Gate_StId = 3, 03002 kG1_Gate_StId = 4, 03003 kG01_DIO_Serial_IO_In_Progress_StId = 6 03004 } tId; 03005 03006 inline tTIO* registerMap(void); 03007 03008 // Register Accessors (Compile-time selectable) 03009 inline tG01_Joint_Status_1& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03010 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03011 03012 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03013 03014 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03015 03016 // Field Accessors (Compile-time selectable) 03017 inline tG01_Joint_Status_1& setG0_Bank_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03018 inline u16 getG0_Bank_St(nMDBG::tStatus2* statusChain = NULL) const; 03019 03020 inline u16 readG0_Bank_St(nMDBG::tStatus2* statusChain = NULL); 03021 03022 inline tG01_Joint_Status_1& setG1_Bank_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03023 inline u16 getG1_Bank_St(nMDBG::tStatus2* statusChain = NULL) const; 03024 03025 inline u16 readG1_Bank_St(nMDBG::tStatus2* statusChain = NULL); 03026 03027 inline tG01_Joint_Status_1& setG0_Gate_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03028 inline u16 getG0_Gate_St(nMDBG::tStatus2* statusChain = NULL) const; 03029 03030 inline u16 readG0_Gate_St(nMDBG::tStatus2* statusChain = NULL); 03031 03032 inline tG01_Joint_Status_1& setG1_Gate_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03033 inline u16 getG1_Gate_St(nMDBG::tStatus2* statusChain = NULL) const; 03034 03035 inline u16 readG1_Gate_St(nMDBG::tStatus2* statusChain = NULL); 03036 03037 inline tG01_Joint_Status_1& setG01_DIO_Serial_IO_In_Progress_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03038 inline u16 getG01_DIO_Serial_IO_In_Progress_St(nMDBG::tStatus2* statusChain = NULL) const; 03039 03040 inline u16 readG01_DIO_Serial_IO_In_Progress_St(nMDBG::tStatus2* statusChain = NULL); 03041 03042 // Run-time selectable Register/Field Accessors 03043 private: 03044 u16 _softCopy; 03045 03046 inline void setRegisterMap(tTIO* pTIO); 03047 tTIO* _TIO; 03048 03049 friend class tTIO; 03050 03051 }; 03052 03053 //--------------------------------------------------------------------------- 03054 // G01_Joint_Status_2 03055 //--------------------------------------------------------------------------- 03056 class tG01_Joint_Status_2 : public tReg16IODirect32 03057 { 03058 public: 03059 typedef tReg16IODirect32 tIOStrategy; 03060 typedef tTIO tRegisterMap; 03061 03062 enum { 03063 kOffset = 0x3a, 03064 kId = 36 03065 }; 03066 tG01_Joint_Status_2(); 03067 03068 03069 typedef enum { 03070 kRegisterId = 0, 03071 kG0_Output_StId = 1, 03072 kG1_Output_StId = 2, 03073 kG0_HW_Save_StId = 4, 03074 kG1_HW_Save_StId = 5, 03075 kG0_Permanent_Stale_Data_StId = 6, 03076 kG1_Permanent_Stale_Data_StId = 7 03077 } tId; 03078 03079 inline tTIO* registerMap(void); 03080 03081 // Register Accessors (Compile-time selectable) 03082 inline tG01_Joint_Status_2& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03083 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03084 03085 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03086 03087 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03088 03089 // Field Accessors (Compile-time selectable) 03090 inline tG01_Joint_Status_2& setG0_Output_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03091 inline u16 getG0_Output_St(nMDBG::tStatus2* statusChain = NULL) const; 03092 03093 inline u16 readG0_Output_St(nMDBG::tStatus2* statusChain = NULL); 03094 03095 inline tG01_Joint_Status_2& setG1_Output_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03096 inline u16 getG1_Output_St(nMDBG::tStatus2* statusChain = NULL) const; 03097 03098 inline u16 readG1_Output_St(nMDBG::tStatus2* statusChain = NULL); 03099 03100 inline tG01_Joint_Status_2& setG0_HW_Save_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03101 inline u16 getG0_HW_Save_St(nMDBG::tStatus2* statusChain = NULL) const; 03102 03103 inline u16 readG0_HW_Save_St(nMDBG::tStatus2* statusChain = NULL); 03104 03105 inline tG01_Joint_Status_2& setG1_HW_Save_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03106 inline u16 getG1_HW_Save_St(nMDBG::tStatus2* statusChain = NULL) const; 03107 03108 inline u16 readG1_HW_Save_St(nMDBG::tStatus2* statusChain = NULL); 03109 03110 inline tG01_Joint_Status_2& setG0_Permanent_Stale_Data_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03111 inline u16 getG0_Permanent_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL) const; 03112 03113 inline u16 readG0_Permanent_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL); 03114 03115 inline tG01_Joint_Status_2& setG1_Permanent_Stale_Data_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03116 inline u16 getG1_Permanent_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL) const; 03117 03118 inline u16 readG1_Permanent_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL); 03119 03120 // Run-time selectable Register/Field Accessors 03121 private: 03122 u16 _softCopy; 03123 03124 inline void setRegisterMap(tTIO* pTIO); 03125 tTIO* _TIO; 03126 03127 friend class tTIO; 03128 03129 }; 03130 03131 //--------------------------------------------------------------------------- 03132 // G01_Status 03133 //--------------------------------------------------------------------------- 03134 class tG01_Status : public tReg16IODirect32 03135 { 03136 public: 03137 typedef tReg16IODirect32 tIOStrategy; 03138 typedef tTIO tRegisterMap; 03139 03140 enum { 03141 kOffset = 0x8, 03142 kId = 37 03143 }; 03144 tG01_Status(); 03145 03146 03147 typedef enum { 03148 kRegisterId = 0, 03149 kG0_Save_StId = 1, 03150 kG1_Save_StId = 2, 03151 kG0_Counting_StId = 3, 03152 kG1_Counting_StId = 4, 03153 kG0_Next_Load_Source_StId = 5, 03154 kG1_Next_Load_Source_StId = 6, 03155 kG0_Stale_Data_StId = 7, 03156 kG1_Stale_Data_StId = 8, 03157 kG0_Armed_StId = 9, 03158 kG1_Armed_StId = 10, 03159 kG0_No_Load_Between_Gates_StId = 11, 03160 kG1_No_Load_Between_Gates_StId = 12, 03161 kG0_TC_Error_StId = 13, 03162 kG1_TC_Error_StId = 14, 03163 kG0_Gate_Error_StId = 15, 03164 kG1_Gate_Error_StId = 16 03165 } tId; 03166 03167 inline tTIO* registerMap(void); 03168 03169 // Register Accessors (Compile-time selectable) 03170 inline tG01_Status& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03171 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03172 03173 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03174 03175 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03176 03177 // Field Accessors (Compile-time selectable) 03178 inline tG01_Status& setG0_Save_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03179 inline u16 getG0_Save_St(nMDBG::tStatus2* statusChain = NULL) const; 03180 03181 inline u16 readG0_Save_St(nMDBG::tStatus2* statusChain = NULL); 03182 03183 inline tG01_Status& setG1_Save_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03184 inline u16 getG1_Save_St(nMDBG::tStatus2* statusChain = NULL) const; 03185 03186 inline u16 readG1_Save_St(nMDBG::tStatus2* statusChain = NULL); 03187 03188 inline tG01_Status& setG0_Counting_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03189 inline u16 getG0_Counting_St(nMDBG::tStatus2* statusChain = NULL) const; 03190 03191 inline u16 readG0_Counting_St(nMDBG::tStatus2* statusChain = NULL); 03192 03193 inline tG01_Status& setG1_Counting_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03194 inline u16 getG1_Counting_St(nMDBG::tStatus2* statusChain = NULL) const; 03195 03196 inline u16 readG1_Counting_St(nMDBG::tStatus2* statusChain = NULL); 03197 03198 inline tG01_Status& setG0_Next_Load_Source_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03199 inline u16 getG0_Next_Load_Source_St(nMDBG::tStatus2* statusChain = NULL) const; 03200 03201 inline u16 readG0_Next_Load_Source_St(nMDBG::tStatus2* statusChain = NULL); 03202 03203 inline tG01_Status& setG1_Next_Load_Source_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03204 inline u16 getG1_Next_Load_Source_St(nMDBG::tStatus2* statusChain = NULL) const; 03205 03206 inline u16 readG1_Next_Load_Source_St(nMDBG::tStatus2* statusChain = NULL); 03207 03208 inline tG01_Status& setG0_Stale_Data_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03209 inline u16 getG0_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL) const; 03210 03211 inline u16 readG0_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL); 03212 03213 inline tG01_Status& setG1_Stale_Data_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03214 inline u16 getG1_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL) const; 03215 03216 inline u16 readG1_Stale_Data_St(nMDBG::tStatus2* statusChain = NULL); 03217 03218 inline tG01_Status& setG0_Armed_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03219 inline u16 getG0_Armed_St(nMDBG::tStatus2* statusChain = NULL) const; 03220 03221 inline u16 readG0_Armed_St(nMDBG::tStatus2* statusChain = NULL); 03222 03223 inline tG01_Status& setG1_Armed_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03224 inline u16 getG1_Armed_St(nMDBG::tStatus2* statusChain = NULL) const; 03225 03226 inline u16 readG1_Armed_St(nMDBG::tStatus2* statusChain = NULL); 03227 03228 inline tG01_Status& setG0_No_Load_Between_Gates_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03229 inline u16 getG0_No_Load_Between_Gates_St(nMDBG::tStatus2* statusChain = NULL) const; 03230 03231 inline u16 readG0_No_Load_Between_Gates_St(nMDBG::tStatus2* statusChain = NULL); 03232 03233 inline tG01_Status& setG1_No_Load_Between_Gates_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03234 inline u16 getG1_No_Load_Between_Gates_St(nMDBG::tStatus2* statusChain = NULL) const; 03235 03236 inline u16 readG1_No_Load_Between_Gates_St(nMDBG::tStatus2* statusChain = NULL); 03237 03238 inline tG01_Status& setG0_TC_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03239 inline u16 getG0_TC_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 03240 03241 inline u16 readG0_TC_Error_St(nMDBG::tStatus2* statusChain = NULL); 03242 03243 inline tG01_Status& setG1_TC_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03244 inline u16 getG1_TC_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 03245 03246 inline u16 readG1_TC_Error_St(nMDBG::tStatus2* statusChain = NULL); 03247 03248 inline tG01_Status& setG0_Gate_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03249 inline u16 getG0_Gate_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 03250 03251 inline u16 readG0_Gate_Error_St(nMDBG::tStatus2* statusChain = NULL); 03252 03253 inline tG01_Status& setG1_Gate_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03254 inline u16 getG1_Gate_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 03255 03256 inline u16 readG1_Gate_Error_St(nMDBG::tStatus2* statusChain = NULL); 03257 03258 // Run-time selectable Register/Field Accessors 03259 private: 03260 u16 _softCopy; 03261 03262 inline void setRegisterMap(tTIO* pTIO); 03263 tTIO* _TIO; 03264 03265 friend class tTIO; 03266 03267 }; 03268 03269 //--------------------------------------------------------------------------- 03270 // G1_DMA_Status 03271 //--------------------------------------------------------------------------- 03272 class tG1_DMA_Status : public tReg16IODirect32 03273 { 03274 public: 03275 typedef tReg16IODirect32 tIOStrategy; 03276 typedef tTIO tRegisterMap; 03277 03278 enum { 03279 kOffset = 0xba, 03280 kId = 38 03281 }; 03282 tG1_DMA_Status(); 03283 03284 03285 typedef enum { 03286 kRegisterId = 0, 03287 kG1_DMA_Read_ValueId = 2, 03288 kG1_DMA_Error_StId = 3, 03289 kG1_DRQ_StId = 4 03290 } tId; 03291 03292 inline tTIO* registerMap(void); 03293 03294 // Register Accessors (Compile-time selectable) 03295 inline tG1_DMA_Status& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03296 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03297 03298 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03299 03300 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03301 03302 // Field Accessors (Compile-time selectable) 03303 inline tG1_DMA_Status& setG1_DMA_Read_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03304 inline u16 getG1_DMA_Read_Value(nMDBG::tStatus2* statusChain = NULL) const; 03305 03306 inline u16 readG1_DMA_Read_Value(nMDBG::tStatus2* statusChain = NULL); 03307 03308 inline tG1_DMA_Status& setG1_DMA_Error_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03309 inline u16 getG1_DMA_Error_St(nMDBG::tStatus2* statusChain = NULL) const; 03310 03311 inline u16 readG1_DMA_Error_St(nMDBG::tStatus2* statusChain = NULL); 03312 03313 inline tG1_DMA_Status& setG1_DRQ_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03314 inline u16 getG1_DRQ_St(nMDBG::tStatus2* statusChain = NULL) const; 03315 03316 inline u16 readG1_DRQ_St(nMDBG::tStatus2* statusChain = NULL); 03317 03318 // Run-time selectable Register/Field Accessors 03319 private: 03320 u16 _softCopy; 03321 03322 inline void setRegisterMap(tTIO* pTIO); 03323 tTIO* _TIO; 03324 03325 friend class tTIO; 03326 03327 }; 03328 03329 //--------------------------------------------------------------------------- 03330 // G1_HW_Save 03331 //--------------------------------------------------------------------------- 03332 class tG1_HW_Save : public tReg32IODirect32 03333 { 03334 public: 03335 typedef tReg32IODirect32 tIOStrategy; 03336 typedef tTIO tRegisterMap; 03337 03338 enum { 03339 kOffset = 0x14, 03340 kId = 39 03341 }; 03342 tG1_HW_Save(); 03343 03344 03345 typedef enum { 03346 kRegisterId = 0, 03347 kG1_HW_Save_ValueId = 1 03348 } tId; 03349 03350 inline tTIO* registerMap(void); 03351 03352 // Register Accessors (Compile-time selectable) 03353 inline tG1_HW_Save& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 03354 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03355 03356 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03357 03358 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 03359 03360 // Field Accessors (Compile-time selectable) 03361 inline tG1_HW_Save& setG1_HW_Save_Value(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03362 inline u32 getG1_HW_Save_Value(nMDBG::tStatus2* statusChain = NULL) const; 03363 03364 inline u32 readG1_HW_Save_Value(nMDBG::tStatus2* statusChain = NULL); 03365 03366 // Run-time selectable Register/Field Accessors 03367 private: 03368 u32 _softCopy; 03369 03370 inline void setRegisterMap(tTIO* pTIO); 03371 tTIO* _TIO; 03372 03373 friend class tTIO; 03374 03375 }; 03376 03377 //--------------------------------------------------------------------------- 03378 // G1_HW_Save_High 03379 //--------------------------------------------------------------------------- 03380 class tG1_HW_Save_High : public tReg16IODirect32 03381 { 03382 public: 03383 typedef tReg16IODirect32 tIOStrategy; 03384 typedef tTIO tRegisterMap; 03385 03386 enum { 03387 kOffset = 0x14, 03388 kId = 40 03389 }; 03390 tG1_HW_Save_High(); 03391 03392 03393 typedef enum { 03394 kRegisterId = 0, 03395 kG1_HW_Save_High_ValueId = 1 03396 } tId; 03397 03398 inline tTIO* registerMap(void); 03399 03400 // Register Accessors (Compile-time selectable) 03401 inline tG1_HW_Save_High& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03402 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03403 03404 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03405 03406 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03407 03408 // Field Accessors (Compile-time selectable) 03409 inline tG1_HW_Save_High& setG1_HW_Save_High_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03410 inline u16 getG1_HW_Save_High_Value(nMDBG::tStatus2* statusChain = NULL) const; 03411 03412 inline u16 readG1_HW_Save_High_Value(nMDBG::tStatus2* statusChain = NULL); 03413 03414 // Run-time selectable Register/Field Accessors 03415 private: 03416 u16 _softCopy; 03417 03418 inline void setRegisterMap(tTIO* pTIO); 03419 tTIO* _TIO; 03420 03421 friend class tTIO; 03422 03423 }; 03424 03425 //--------------------------------------------------------------------------- 03426 // G1_HW_Save_Low 03427 //--------------------------------------------------------------------------- 03428 class tG1_HW_Save_Low : public tReg16IODirect32 03429 { 03430 public: 03431 typedef tReg16IODirect32 tIOStrategy; 03432 typedef tTIO tRegisterMap; 03433 03434 enum { 03435 kOffset = 0x16, 03436 kId = 41 03437 }; 03438 tG1_HW_Save_Low(); 03439 03440 03441 typedef enum { 03442 kRegisterId = 0, 03443 kG1_HW_Save_Low_ValueId = 1 03444 } tId; 03445 03446 inline tTIO* registerMap(void); 03447 03448 // Register Accessors (Compile-time selectable) 03449 inline tG1_HW_Save_Low& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03450 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03451 03452 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03453 03454 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03455 03456 // Field Accessors (Compile-time selectable) 03457 inline tG1_HW_Save_Low& setG1_HW_Save_Low_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03458 inline u16 getG1_HW_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL) const; 03459 03460 inline u16 readG1_HW_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL); 03461 03462 // Run-time selectable Register/Field Accessors 03463 private: 03464 u16 _softCopy; 03465 03466 inline void setRegisterMap(tTIO* pTIO); 03467 tTIO* _TIO; 03468 03469 friend class tTIO; 03470 03471 }; 03472 03473 //--------------------------------------------------------------------------- 03474 // G1_Save 03475 //--------------------------------------------------------------------------- 03476 class tG1_Save : public tReg32IODirect32 03477 { 03478 public: 03479 typedef tReg32IODirect32 tIOStrategy; 03480 typedef tTIO tRegisterMap; 03481 03482 enum { 03483 kOffset = 0x1c, 03484 kId = 42 03485 }; 03486 tG1_Save(); 03487 03488 03489 typedef enum { 03490 kRegisterId = 0, 03491 kG1_Save_ValueId = 1 03492 } tId; 03493 03494 inline tTIO* registerMap(void); 03495 03496 // Register Accessors (Compile-time selectable) 03497 inline tG1_Save& setRegister(u32 value, nMDBG::tStatus2* statusChain = NULL); 03498 inline u32 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03499 03500 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03501 03502 inline u32 readRegister(nMDBG::tStatus2* statusChain = NULL); 03503 03504 // Field Accessors (Compile-time selectable) 03505 inline tG1_Save& setG1_Save_Value(u32 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03506 inline u32 getG1_Save_Value(nMDBG::tStatus2* statusChain = NULL) const; 03507 03508 inline u32 readG1_Save_Value(nMDBG::tStatus2* statusChain = NULL); 03509 03510 // Run-time selectable Register/Field Accessors 03511 private: 03512 u32 _softCopy; 03513 03514 inline void setRegisterMap(tTIO* pTIO); 03515 tTIO* _TIO; 03516 03517 friend class tTIO; 03518 03519 }; 03520 03521 //--------------------------------------------------------------------------- 03522 // G1_Save_High 03523 //--------------------------------------------------------------------------- 03524 class tG1_Save_High : public tReg16IODirect32 03525 { 03526 public: 03527 typedef tReg16IODirect32 tIOStrategy; 03528 typedef tTIO tRegisterMap; 03529 03530 enum { 03531 kOffset = 0x1c, 03532 kId = 43 03533 }; 03534 tG1_Save_High(); 03535 03536 03537 typedef enum { 03538 kRegisterId = 0, 03539 kG1_Save_High_ValueId = 1 03540 } tId; 03541 03542 inline tTIO* registerMap(void); 03543 03544 // Register Accessors (Compile-time selectable) 03545 inline tG1_Save_High& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03546 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03547 03548 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03549 03550 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03551 03552 // Field Accessors (Compile-time selectable) 03553 inline tG1_Save_High& setG1_Save_High_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03554 inline u16 getG1_Save_High_Value(nMDBG::tStatus2* statusChain = NULL) const; 03555 03556 inline u16 readG1_Save_High_Value(nMDBG::tStatus2* statusChain = NULL); 03557 03558 // Run-time selectable Register/Field Accessors 03559 private: 03560 u16 _softCopy; 03561 03562 inline void setRegisterMap(tTIO* pTIO); 03563 tTIO* _TIO; 03564 03565 friend class tTIO; 03566 03567 }; 03568 03569 //--------------------------------------------------------------------------- 03570 // G1_Save_Low 03571 //--------------------------------------------------------------------------- 03572 class tG1_Save_Low : public tReg16IODirect32 03573 { 03574 public: 03575 typedef tReg16IODirect32 tIOStrategy; 03576 typedef tTIO tRegisterMap; 03577 03578 enum { 03579 kOffset = 0x1e, 03580 kId = 44 03581 }; 03582 tG1_Save_Low(); 03583 03584 03585 typedef enum { 03586 kRegisterId = 0, 03587 kG1_Save_Low_ValueId = 1 03588 } tId; 03589 03590 inline tTIO* registerMap(void); 03591 03592 // Register Accessors (Compile-time selectable) 03593 inline tG1_Save_Low& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03594 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03595 03596 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03597 03598 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03599 03600 // Field Accessors (Compile-time selectable) 03601 inline tG1_Save_Low& setG1_Save_Low_Value(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03602 inline u16 getG1_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL) const; 03603 03604 inline u16 readG1_Save_Low_Value(nMDBG::tStatus2* statusChain = NULL); 03605 03606 // Run-time selectable Register/Field Accessors 03607 private: 03608 u16 _softCopy; 03609 03610 inline void setRegisterMap(tTIO* pTIO); 03611 tTIO* _TIO; 03612 03613 friend class tTIO; 03614 03615 }; 03616 03617 //--------------------------------------------------------------------------- 03618 // G1_Status_1 03619 //--------------------------------------------------------------------------- 03620 class tG1_Status_1 : public tReg16IODirect32 03621 { 03622 public: 03623 typedef tReg16IODirect32 tIOStrategy; 03624 typedef tTIO tRegisterMap; 03625 03626 enum { 03627 kOffset = 0x6, 03628 kId = 45 03629 }; 03630 tG1_Status_1(); 03631 03632 03633 typedef enum { 03634 kRegisterId = 0, 03635 kG1_Gate_Interrupt_StId = 2, 03636 kG1_TC_StId = 3, 03637 kG1_Interrupt_StId = 5 03638 } tId; 03639 03640 inline tTIO* registerMap(void); 03641 03642 // Register Accessors (Compile-time selectable) 03643 inline tG1_Status_1& setRegister(u16 value, nMDBG::tStatus2* statusChain = NULL); 03644 inline u16 getRegister(nMDBG::tStatus2* statusChain = NULL) const; 03645 03646 inline void refresh(nMDBG::tStatus2* statusChain = NULL); 03647 03648 inline u16 readRegister(nMDBG::tStatus2* statusChain = NULL); 03649 03650 // Field Accessors (Compile-time selectable) 03651 inline tG1_Status_1& setG1_Gate_Interrupt_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03652 inline u16 getG1_Gate_Interrupt_St(nMDBG::tStatus2* statusChain = NULL) const; 03653 03654 inline u16 readG1_Gate_Interrupt_St(nMDBG::tStatus2* statusChain = NULL); 03655 03656 inline tG1_Status_1& setG1_TC_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03657 inline u16 getG1_TC_St(nMDBG::tStatus2* statusChain = NULL) const; 03658 03659 inline u16 readG1_TC_St(nMDBG::tStatus2* statusChain = NULL); 03660 03661 inline tG1_Status_1& setG1_Interrupt_St(u16 fieldValue, nMDBG::tStatus2* statusChain = NULL); 03662 inline u16 getG1_Interrupt_St(nMDBG::tStatus2* statusChain = NULL) const; 03663 03664 inline u16 readG1_Interrupt_St(nMDBG::tStatus2* statusChain = NULL); 03665 03666 // Run-time selectable Register/Field Accessors 03667 private: 03668 u16 _softCopy; 03669 03670 inline void setRegisterMap(tTIO* pTIO); 03671 tTIO* _TIO; 03672 03673 friend class tTIO; 03674 03675 }; 03676 03677 //--------------------------------------------------------------------------- 03678 // G0_AutoIncrement 03679 //--------------------------------------------------------------------------- 03680 tG0_AutoIncrement G0_AutoIncrement; 03681 03682 //--------------------------------------------------------------------------- 03683 // G0_Command 03684 //--------------------------------------------------------------------------- 03685 tG0_Command G0_Command; 03686 03687 //--------------------------------------------------------------------------- 03688 // G0_Counting_Mode 03689 //--------------------------------------------------------------------------- 03690 tG0_Counting_Mode G0_Counting_Mode; 03691 03692 //--------------------------------------------------------------------------- 03693 // G0_MSeries_Counting_Mode 03694 //--------------------------------------------------------------------------- 03695 tG0_MSeries_Counting_Mode G0_MSeries_Counting_Mode; 03696 03697 //--------------------------------------------------------------------------- 03698 // G0_DMA_Control 03699 //--------------------------------------------------------------------------- 03700 tG0_DMA_Control G0_DMA_Control; 03701 03702 //--------------------------------------------------------------------------- 03703 // G0_Input_Select 03704 //--------------------------------------------------------------------------- 03705 tG0_Input_Select G0_Input_Select; 03706 03707 //--------------------------------------------------------------------------- 03708 // G0_Load_A 03709 //--------------------------------------------------------------------------- 03710 tG0_Load_A G0_Load_A; 03711 03712 //--------------------------------------------------------------------------- 03713 // G0_Load_B 03714 //--------------------------------------------------------------------------- 03715 tG0_Load_B G0_Load_B; 03716 03717 //--------------------------------------------------------------------------- 03718 // G0_Mode 03719 //--------------------------------------------------------------------------- 03720 tG0_Mode G0_Mode; 03721 03722 //--------------------------------------------------------------------------- 03723 // G0_Second_Gate 03724 //--------------------------------------------------------------------------- 03725 tG0_Second_Gate G0_Second_Gate; 03726 03727 //--------------------------------------------------------------------------- 03728 // G0_MSeries_ABZ 03729 //--------------------------------------------------------------------------- 03730 tG0_MSeries_ABZ G0_MSeries_ABZ; 03731 03732 //--------------------------------------------------------------------------- 03733 // G01_Joint_Reset 03734 //--------------------------------------------------------------------------- 03735 tG01_Joint_Reset G01_Joint_Reset; 03736 03737 //--------------------------------------------------------------------------- 03738 // G1_AutoIncrement 03739 //--------------------------------------------------------------------------- 03740 tG1_AutoIncrement G1_AutoIncrement; 03741 03742 //--------------------------------------------------------------------------- 03743 // G1_Command 03744 //--------------------------------------------------------------------------- 03745 tG1_Command G1_Command; 03746 03747 //--------------------------------------------------------------------------- 03748 // G1_Counting_Mode 03749 //--------------------------------------------------------------------------- 03750 tG1_Counting_Mode G1_Counting_Mode; 03751 03752 //--------------------------------------------------------------------------- 03753 // G1_MSeries_Counting_Mode 03754 //--------------------------------------------------------------------------- 03755 tG1_MSeries_Counting_Mode G1_MSeries_Counting_Mode; 03756 03757 //--------------------------------------------------------------------------- 03758 // G1_DMA_Control 03759 //--------------------------------------------------------------------------- 03760 tG1_DMA_Control G1_DMA_Control; 03761 03762 //--------------------------------------------------------------------------- 03763 // G1_Input_Select 03764 //--------------------------------------------------------------------------- 03765 tG1_Input_Select G1_Input_Select; 03766 03767 //--------------------------------------------------------------------------- 03768 // G1_Load_A 03769 //--------------------------------------------------------------------------- 03770 tG1_Load_A G1_Load_A; 03771 03772 //--------------------------------------------------------------------------- 03773 // G1_Load_B 03774 //--------------------------------------------------------------------------- 03775 tG1_Load_B G1_Load_B; 03776 03777 //--------------------------------------------------------------------------- 03778 // G1_Mode 03779 //--------------------------------------------------------------------------- 03780 tG1_Mode G1_Mode; 03781 03782 //--------------------------------------------------------------------------- 03783 // G1_Second_Gate 03784 //--------------------------------------------------------------------------- 03785 tG1_Second_Gate G1_Second_Gate; 03786 03787 //--------------------------------------------------------------------------- 03788 // G1_MSeries_ABZ 03789 //--------------------------------------------------------------------------- 03790 tG1_MSeries_ABZ G1_MSeries_ABZ; 03791 03792 //--------------------------------------------------------------------------- 03793 // Interrupt_G0_Ack 03794 //--------------------------------------------------------------------------- 03795 tInterrupt_G0_Ack Interrupt_G0_Ack; 03796 03797 //--------------------------------------------------------------------------- 03798 // Interrupt_G0_Enable 03799 //--------------------------------------------------------------------------- 03800 tInterrupt_G0_Enable Interrupt_G0_Enable; 03801 03802 //--------------------------------------------------------------------------- 03803 // Interrupt_G1_Ack 03804 //--------------------------------------------------------------------------- 03805 tInterrupt_G1_Ack Interrupt_G1_Ack; 03806 03807 //--------------------------------------------------------------------------- 03808 // Interrupt_G1_Enable 03809 //--------------------------------------------------------------------------- 03810 tInterrupt_G1_Enable Interrupt_G1_Enable; 03811 03812 //--------------------------------------------------------------------------- 03813 // G0_DMA_Status 03814 //--------------------------------------------------------------------------- 03815 tG0_DMA_Status G0_DMA_Status; 03816 03817 //--------------------------------------------------------------------------- 03818 // G0_HW_Save 03819 //--------------------------------------------------------------------------- 03820 tG0_HW_Save G0_HW_Save; 03821 03822 //--------------------------------------------------------------------------- 03823 // G0_HW_Save_High 03824 //--------------------------------------------------------------------------- 03825 tG0_HW_Save_High G0_HW_Save_High; 03826 03827 //--------------------------------------------------------------------------- 03828 // G0_HW_Save_Low 03829 //--------------------------------------------------------------------------- 03830 tG0_HW_Save_Low G0_HW_Save_Low; 03831 03832 //--------------------------------------------------------------------------- 03833 // G0_Save 03834 //--------------------------------------------------------------------------- 03835 tG0_Save G0_Save; 03836 03837 //--------------------------------------------------------------------------- 03838 // G0_Save_High 03839 //--------------------------------------------------------------------------- 03840 tG0_Save_High G0_Save_High; 03841 03842 //--------------------------------------------------------------------------- 03843 // G0_Save_Low 03844 //--------------------------------------------------------------------------- 03845 tG0_Save_Low G0_Save_Low; 03846 03847 //--------------------------------------------------------------------------- 03848 // G0_Status_1 03849 //--------------------------------------------------------------------------- 03850 tG0_Status_1 G0_Status_1; 03851 03852 //--------------------------------------------------------------------------- 03853 // G01_Joint_Status_1 03854 //--------------------------------------------------------------------------- 03855 tG01_Joint_Status_1 G01_Joint_Status_1; 03856 03857 //--------------------------------------------------------------------------- 03858 // G01_Joint_Status_2 03859 //--------------------------------------------------------------------------- 03860 tG01_Joint_Status_2 G01_Joint_Status_2; 03861 03862 //--------------------------------------------------------------------------- 03863 // G01_Status 03864 //--------------------------------------------------------------------------- 03865 tG01_Status G01_Status; 03866 03867 //--------------------------------------------------------------------------- 03868 // G1_DMA_Status 03869 //--------------------------------------------------------------------------- 03870 tG1_DMA_Status G1_DMA_Status; 03871 03872 //--------------------------------------------------------------------------- 03873 // G1_HW_Save 03874 //--------------------------------------------------------------------------- 03875 tG1_HW_Save G1_HW_Save; 03876 03877 //--------------------------------------------------------------------------- 03878 // G1_HW_Save_High 03879 //--------------------------------------------------------------------------- 03880 tG1_HW_Save_High G1_HW_Save_High; 03881 03882 //--------------------------------------------------------------------------- 03883 // G1_HW_Save_Low 03884 //--------------------------------------------------------------------------- 03885 tG1_HW_Save_Low G1_HW_Save_Low; 03886 03887 //--------------------------------------------------------------------------- 03888 // G1_Save 03889 //--------------------------------------------------------------------------- 03890 tG1_Save G1_Save; 03891 03892 //--------------------------------------------------------------------------- 03893 // G1_Save_High 03894 //--------------------------------------------------------------------------- 03895 tG1_Save_High G1_Save_High; 03896 03897 //--------------------------------------------------------------------------- 03898 // G1_Save_Low 03899 //--------------------------------------------------------------------------- 03900 tG1_Save_Low G1_Save_Low; 03901 03902 //--------------------------------------------------------------------------- 03903 // G1_Status_1 03904 //--------------------------------------------------------------------------- 03905 tG1_Status_1 G1_Status_1; 03906 03907 //--------------------------------------------------------------------------- 03908 // Register Groups 03909 //--------------------------------------------------------------------------- 03910 03911 //---------------------------------------- 03912 // Register/Field Ids 03913 //---------------------------------------- 03914 typedef enum { 03915 kG0_AutoIncrementId = 0, 03916 kG0_AutoIncrementDefaultId = (tG0_AutoIncrement::kDefaultId << 27) | kG0_AutoIncrementId, 03917 03918 kG0_CommandId = 1, 03919 kG0_ArmId = (tG0_Command::kG0_ArmId << 27) | kG0_CommandId, 03920 kG0_Save_TraceId = (tG0_Command::kG0_Save_TraceId << 27) | kG0_CommandId, 03921 kG0_LoadId = (tG0_Command::kG0_LoadId << 27) | kG0_CommandId, 03922 kG0_DisarmId = (tG0_Command::kG0_DisarmId << 27) | kG0_CommandId, 03923 kG0_Up_DownId = (tG0_Command::kG0_Up_DownId << 27) | kG0_CommandId, 03924 kG0_Write_SwitchId = (tG0_Command::kG0_Write_SwitchId << 27) | kG0_CommandId, 03925 kG0_Synchronized_GateId = (tG0_Command::kG0_Synchronized_GateId << 27) | kG0_CommandId, 03926 kG0_Little_Big_EndianId = (tG0_Command::kG0_Little_Big_EndianId << 27) | kG0_CommandId, 03927 kG0_Bank_Switch_StartId = (tG0_Command::kG0_Bank_Switch_StartId << 27) | kG0_CommandId, 03928 kG0_Bank_Switch_ModeId = (tG0_Command::kG0_Bank_Switch_ModeId << 27) | kG0_CommandId, 03929 kG0_Bank_Switch_EnableId = (tG0_Command::kG0_Bank_Switch_EnableId << 27) | kG0_CommandId, 03930 kG1_Arm_CopyId = (tG0_Command::kG1_Arm_CopyId << 27) | kG0_CommandId, 03931 kG1_Save_Trace_CopyId = (tG0_Command::kG1_Save_Trace_CopyId << 27) | kG0_CommandId, 03932 kG1_Disarm_CopyId = (tG0_Command::kG1_Disarm_CopyId << 27) | kG0_CommandId, 03933 03934 kG0_Counting_ModeId = 2, 03935 kG0_Encoder_Counting_ModeId = (tG0_Counting_Mode::kG0_Encoder_Counting_ModeId << 27) | kG0_Counting_ModeId, 03936 kG0_Index_EnableId = (tG0_Counting_Mode::kG0_Index_EnableId << 27) | kG0_Counting_ModeId, 03937 kG0_Index_PhaseId = (tG0_Counting_Mode::kG0_Index_PhaseId << 27) | kG0_Counting_ModeId, 03938 kG0_HW_Arm_EnableId = (tG0_Counting_Mode::kG0_HW_Arm_EnableId << 27) | kG0_Counting_ModeId, 03939 kG0_HW_Arm_SelectId = (tG0_Counting_Mode::kG0_HW_Arm_SelectId << 27) | kG0_Counting_ModeId, 03940 kG0_PrescaleId = (tG0_Counting_Mode::kG0_PrescaleId << 27) | kG0_Counting_ModeId, 03941 kG0_Alternate_SynchronizationId = (tG0_Counting_Mode::kG0_Alternate_SynchronizationId << 27) | kG0_Counting_ModeId, 03942 kG0_Prescale_By_2Id = (tG0_Counting_Mode::kG0_Prescale_By_2Id << 27) | kG0_Counting_ModeId, 03943 03944 kG0_MSeries_Counting_ModeId = 3, 03945 kG0_MSeries_Encoder_Counting_ModeId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Encoder_Counting_ModeId << 27) | kG0_MSeries_Counting_ModeId, 03946 kG0_MSeries_Index_EnableId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Index_EnableId << 27) | kG0_MSeries_Counting_ModeId, 03947 kG0_MSeries_Index_PhaseId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Index_PhaseId << 27) | kG0_MSeries_Counting_ModeId, 03948 kG0_MSeries_HW_Arm_EnableId = (tG0_MSeries_Counting_Mode::kG0_MSeries_HW_Arm_EnableId << 27) | kG0_MSeries_Counting_ModeId, 03949 kG0_MSeries_HW_Arm_SelectId = (tG0_MSeries_Counting_Mode::kG0_MSeries_HW_Arm_SelectId << 27) | kG0_MSeries_Counting_ModeId, 03950 kG0_MSeries_PrescaleId = (tG0_MSeries_Counting_Mode::kG0_MSeries_PrescaleId << 27) | kG0_MSeries_Counting_ModeId, 03951 kG0_MSeries_Alternate_SynchronizationId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Alternate_SynchronizationId << 27) | kG0_MSeries_Counting_ModeId, 03952 kG0_MSeries_Prescale_By_2Id = (tG0_MSeries_Counting_Mode::kG0_MSeries_Prescale_By_2Id << 27) | kG0_MSeries_Counting_ModeId, 03953 03954 kG0_DMA_ControlId = 4, 03955 kG0_DMA_EnableId = (tG0_DMA_Control::kG0_DMA_EnableId << 27) | kG0_DMA_ControlId, 03956 kG0_DMA_Output_EnableId = (tG0_DMA_Control::kG0_DMA_Output_EnableId << 27) | kG0_DMA_ControlId, 03957 kG0_DMA_Int_EnableId = (tG0_DMA_Control::kG0_DMA_Int_EnableId << 27) | kG0_DMA_ControlId, 03958 03959 kG0_Input_SelectId = 5, 03960 kG0_Read_Acknowledges_IrqId = (tG0_Input_Select::kG0_Read_Acknowledges_IrqId << 27) | kG0_Input_SelectId, 03961 kG0_Write_Acknowledges_IrqId = (tG0_Input_Select::kG0_Write_Acknowledges_IrqId << 27) | kG0_Input_SelectId, 03962 kG0_Source_SelectId = (tG0_Input_Select::kG0_Source_SelectId << 27) | kG0_Input_SelectId, 03963 kG0_Gate_SelectId = (tG0_Input_Select::kG0_Gate_SelectId << 27) | kG0_Input_SelectId, 03964 kG0_Gate_Select_Load_SourceId = (tG0_Input_Select::kG0_Gate_Select_Load_SourceId << 27) | kG0_Input_SelectId, 03965 kG0_OR_GateId = (tG0_Input_Select::kG0_OR_GateId << 27) | kG0_Input_SelectId, 03966 kG0_Output_PolarityId = (tG0_Input_Select::kG0_Output_PolarityId << 27) | kG0_Input_SelectId, 03967 kG0_Source_PolarityId = (tG0_Input_Select::kG0_Source_PolarityId << 27) | kG0_Input_SelectId, 03968 03969 kG0_Load_AId = 6, 03970 kG0_Load_ADefaultId = (tG0_Load_A::kDefaultId << 27) | kG0_Load_AId, 03971 03972 kG0_Load_BId = 7, 03973 kG0_Load_BDefaultId = (tG0_Load_B::kDefaultId << 27) | kG0_Load_BId, 03974 03975 kG0_ModeId = 8, 03976 kG0_Gating_ModeId = (tG0_Mode::kG0_Gating_ModeId << 27) | kG0_ModeId, 03977 kG0_Gate_On_Both_EdgesId = (tG0_Mode::kG0_Gate_On_Both_EdgesId << 27) | kG0_ModeId, 03978 kG0_Trigger_Mode_For_Edge_GateId = (tG0_Mode::kG0_Trigger_Mode_For_Edge_GateId << 27) | kG0_ModeId, 03979 kG0_Stop_ModeId = (tG0_Mode::kG0_Stop_ModeId << 27) | kG0_ModeId, 03980 kG0_Load_Source_SelectId = (tG0_Mode::kG0_Load_Source_SelectId << 27) | kG0_ModeId, 03981 kG0_Output_ModeId = (tG0_Mode::kG0_Output_ModeId << 27) | kG0_ModeId, 03982 kG0_Counting_OnceId = (tG0_Mode::kG0_Counting_OnceId << 27) | kG0_ModeId, 03983 kG0_Loading_On_TCId = (tG0_Mode::kG0_Loading_On_TCId << 27) | kG0_ModeId, 03984 kG0_Gate_PolarityId = (tG0_Mode::kG0_Gate_PolarityId << 27) | kG0_ModeId, 03985 kG0_Loading_On_GateId = (tG0_Mode::kG0_Loading_On_GateId << 27) | kG0_ModeId, 03986 kG0_Reload_Source_SwitchingId = (tG0_Mode::kG0_Reload_Source_SwitchingId << 27) | kG0_ModeId, 03987 03988 kG0_Second_GateId = 9, 03989 kG0_Second_Gate_Gating_ModeId = (tG0_Second_Gate::kG0_Second_Gate_Gating_ModeId << 27) | kG0_Second_GateId, 03990 kG0_Second_Gate_SelectId = (tG0_Second_Gate::kG0_Second_Gate_SelectId << 27) | kG0_Second_GateId, 03991 kG0_Second_Gate_PolarityId = (tG0_Second_Gate::kG0_Second_Gate_PolarityId << 27) | kG0_Second_GateId, 03992 kG0_MSeries_Second_Gate_SubSelectId = (tG0_Second_Gate::kG0_MSeries_Second_Gate_SubSelectId << 27) | kG0_Second_GateId, 03993 kG0_MSeries_Source_SubSelectId = (tG0_Second_Gate::kG0_MSeries_Source_SubSelectId << 27) | kG0_Second_GateId, 03994 03995 kG0_MSeries_ABZId = 10, 03996 kG0_Z_SelectId = (tG0_MSeries_ABZ::kG0_Z_SelectId << 27) | kG0_MSeries_ABZId, 03997 kG0_B_SelectId = (tG0_MSeries_ABZ::kG0_B_SelectId << 27) | kG0_MSeries_ABZId, 03998 kG0_A_SelectId = (tG0_MSeries_ABZ::kG0_A_SelectId << 27) | kG0_MSeries_ABZId, 03999 04000 kG01_Joint_ResetId = 11, 04001 kG0_ResetId = (tG01_Joint_Reset::kG0_ResetId << 27) | kG01_Joint_ResetId, 04002 kG1_ResetId = (tG01_Joint_Reset::kG1_ResetId << 27) | kG01_Joint_ResetId, 04003 04004 kG1_AutoIncrementId = 12, 04005 kG1_AutoIncrementDefaultId = (tG1_AutoIncrement::kDefaultId << 27) | kG1_AutoIncrementId, 04006 04007 kG1_CommandId = 13, 04008 kG1_ArmId = (tG1_Command::kG1_ArmId << 27) | kG1_CommandId, 04009 kG1_Save_TraceId = (tG1_Command::kG1_Save_TraceId << 27) | kG1_CommandId, 04010 kG1_LoadId = (tG1_Command::kG1_LoadId << 27) | kG1_CommandId, 04011 kG1_DisarmId = (tG1_Command::kG1_DisarmId << 27) | kG1_CommandId, 04012 kG1_Up_DownId = (tG1_Command::kG1_Up_DownId << 27) | kG1_CommandId, 04013 kG1_Write_SwitchId = (tG1_Command::kG1_Write_SwitchId << 27) | kG1_CommandId, 04014 kG1_Synchronized_GateId = (tG1_Command::kG1_Synchronized_GateId << 27) | kG1_CommandId, 04015 kG1_Little_Big_EndianId = (tG1_Command::kG1_Little_Big_EndianId << 27) | kG1_CommandId, 04016 kG1_Bank_Switch_StartId = (tG1_Command::kG1_Bank_Switch_StartId << 27) | kG1_CommandId, 04017 kG1_Bank_Switch_ModeId = (tG1_Command::kG1_Bank_Switch_ModeId << 27) | kG1_CommandId, 04018 kG1_Bank_Switch_EnableId = (tG1_Command::kG1_Bank_Switch_EnableId << 27) | kG1_CommandId, 04019 kG0_Arm_CopyId = (tG1_Command::kG0_Arm_CopyId << 27) | kG1_CommandId, 04020 kG0_Save_Trace_CopyId = (tG1_Command::kG0_Save_Trace_CopyId << 27) | kG1_CommandId, 04021 kG0_Disarm_CopyId = (tG1_Command::kG0_Disarm_CopyId << 27) | kG1_CommandId, 04022 04023 kG1_Counting_ModeId = 14, 04024 kG1_Encoder_Counting_ModeId = (tG1_Counting_Mode::kG1_Encoder_Counting_ModeId << 27) | kG1_Counting_ModeId, 04025 kG1_Index_EnableId = (tG1_Counting_Mode::kG1_Index_EnableId << 27) | kG1_Counting_ModeId, 04026 kG1_Index_PhaseId = (tG1_Counting_Mode::kG1_Index_PhaseId << 27) | kG1_Counting_ModeId, 04027 kG1_HW_Arm_EnableId = (tG1_Counting_Mode::kG1_HW_Arm_EnableId << 27) | kG1_Counting_ModeId, 04028 kG1_HW_Arm_SelectId = (tG1_Counting_Mode::kG1_HW_Arm_SelectId << 27) | kG1_Counting_ModeId, 04029 kG1_PrescaleId = (tG1_Counting_Mode::kG1_PrescaleId << 27) | kG1_Counting_ModeId, 04030 kG1_Alternate_SynchronizationId = (tG1_Counting_Mode::kG1_Alternate_SynchronizationId << 27) | kG1_Counting_ModeId, 04031 kG1_Prescale_By_2Id = (tG1_Counting_Mode::kG1_Prescale_By_2Id << 27) | kG1_Counting_ModeId, 04032 04033 kG1_MSeries_Counting_ModeId = 15, 04034 kG1_MSeries_Encoder_Counting_ModeId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Encoder_Counting_ModeId << 27) | kG1_MSeries_Counting_ModeId, 04035 kG1_MSeries_Index_EnableId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Index_EnableId << 27) | kG1_MSeries_Counting_ModeId, 04036 kG1_MSeries_Index_PhaseId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Index_PhaseId << 27) | kG1_MSeries_Counting_ModeId, 04037 kG1_MSeries_HW_Arm_EnableId = (tG1_MSeries_Counting_Mode::kG1_MSeries_HW_Arm_EnableId << 27) | kG1_MSeries_Counting_ModeId, 04038 kG1_MSeries_HW_Arm_SelectId = (tG1_MSeries_Counting_Mode::kG1_MSeries_HW_Arm_SelectId << 27) | kG1_MSeries_Counting_ModeId, 04039 kG1_MSeries_PrescaleId = (tG1_MSeries_Counting_Mode::kG1_MSeries_PrescaleId << 27) | kG1_MSeries_Counting_ModeId, 04040 kG1_MSeries_Alternate_SynchronizationId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Alternate_SynchronizationId << 27) | kG1_MSeries_Counting_ModeId, 04041 kG1_MSeries_Prescale_By_2Id = (tG1_MSeries_Counting_Mode::kG1_MSeries_Prescale_By_2Id << 27) | kG1_MSeries_Counting_ModeId, 04042 04043 kG1_DMA_ControlId = 16, 04044 kG1_DMA_EnableId = (tG1_DMA_Control::kG1_DMA_EnableId << 27) | kG1_DMA_ControlId, 04045 kG1_DMA_Output_EnableId = (tG1_DMA_Control::kG1_DMA_Output_EnableId << 27) | kG1_DMA_ControlId, 04046 kG1_DMA_Int_EnableId = (tG1_DMA_Control::kG1_DMA_Int_EnableId << 27) | kG1_DMA_ControlId, 04047 04048 kG1_Input_SelectId = 17, 04049 kG1_Read_Acknowledges_IrqId = (tG1_Input_Select::kG1_Read_Acknowledges_IrqId << 27) | kG1_Input_SelectId, 04050 kG1_Write_Acknowledges_IrqId = (tG1_Input_Select::kG1_Write_Acknowledges_IrqId << 27) | kG1_Input_SelectId, 04051 kG1_Source_SelectId = (tG1_Input_Select::kG1_Source_SelectId << 27) | kG1_Input_SelectId, 04052 kG1_Gate_SelectId = (tG1_Input_Select::kG1_Gate_SelectId << 27) | kG1_Input_SelectId, 04053 kG1_Gate_Select_Load_SourceId = (tG1_Input_Select::kG1_Gate_Select_Load_SourceId << 27) | kG1_Input_SelectId, 04054 kG1_OR_GateId = (tG1_Input_Select::kG1_OR_GateId << 27) | kG1_Input_SelectId, 04055 kG1_Output_PolarityId = (tG1_Input_Select::kG1_Output_PolarityId << 27) | kG1_Input_SelectId, 04056 kG1_Source_PolarityId = (tG1_Input_Select::kG1_Source_PolarityId << 27) | kG1_Input_SelectId, 04057 04058 kG1_Load_AId = 18, 04059 kG1_Load_ADefaultId = (tG1_Load_A::kDefaultId << 27) | kG1_Load_AId, 04060 04061 kG1_Load_BId = 19, 04062 kG1_Load_BDefaultId = (tG1_Load_B::kDefaultId << 27) | kG1_Load_BId, 04063 04064 kG1_ModeId = 20, 04065 kG1_Gating_ModeId = (tG1_Mode::kG1_Gating_ModeId << 27) | kG1_ModeId, 04066 kG1_Gate_On_Both_EdgesId = (tG1_Mode::kG1_Gate_On_Both_EdgesId << 27) | kG1_ModeId, 04067 kG1_Trigger_Mode_For_Edge_GateId = (tG1_Mode::kG1_Trigger_Mode_For_Edge_GateId << 27) | kG1_ModeId, 04068 kG1_Stop_ModeId = (tG1_Mode::kG1_Stop_ModeId << 27) | kG1_ModeId, 04069 kG1_Load_Source_SelectId = (tG1_Mode::kG1_Load_Source_SelectId << 27) | kG1_ModeId, 04070 kG1_Output_ModeId = (tG1_Mode::kG1_Output_ModeId << 27) | kG1_ModeId, 04071 kG1_Counting_OnceId = (tG1_Mode::kG1_Counting_OnceId << 27) | kG1_ModeId, 04072 kG1_Loading_On_TCId = (tG1_Mode::kG1_Loading_On_TCId << 27) | kG1_ModeId, 04073 kG1_Gate_PolarityId = (tG1_Mode::kG1_Gate_PolarityId << 27) | kG1_ModeId, 04074 kG1_Loading_On_GateId = (tG1_Mode::kG1_Loading_On_GateId << 27) | kG1_ModeId, 04075 kG1_Reload_Source_SwitchingId = (tG1_Mode::kG1_Reload_Source_SwitchingId << 27) | kG1_ModeId, 04076 04077 kG1_Second_GateId = 21, 04078 kG1_Second_Gate_Gating_ModeId = (tG1_Second_Gate::kG1_Second_Gate_Gating_ModeId << 27) | kG1_Second_GateId, 04079 kG1_Second_Gate_SelectId = (tG1_Second_Gate::kG1_Second_Gate_SelectId << 27) | kG1_Second_GateId, 04080 kG1_Second_Gate_PolarityId = (tG1_Second_Gate::kG1_Second_Gate_PolarityId << 27) | kG1_Second_GateId, 04081 kG1_MSeries_Second_Gate_SubSelectId = (tG1_Second_Gate::kG1_MSeries_Second_Gate_SubSelectId << 27) | kG1_Second_GateId, 04082 kG1_MSeries_Source_SubSelectId = (tG1_Second_Gate::kG1_MSeries_Source_SubSelectId << 27) | kG1_Second_GateId, 04083 04084 kG1_MSeries_ABZId = 22, 04085 kG1_Z_SelectId = (tG1_MSeries_ABZ::kG1_Z_SelectId << 27) | kG1_MSeries_ABZId, 04086 kG1_B_SelectId = (tG1_MSeries_ABZ::kG1_B_SelectId << 27) | kG1_MSeries_ABZId, 04087 kG1_A_SelectId = (tG1_MSeries_ABZ::kG1_A_SelectId << 27) | kG1_MSeries_ABZId, 04088 04089 kInterrupt_G0_AckId = 23, 04090 kG0_Gate_Error_ConfirmId = (tInterrupt_G0_Ack::kG0_Gate_Error_ConfirmId << 27) | kInterrupt_G0_AckId, 04091 kG0_TC_Error_ConfirmId = (tInterrupt_G0_Ack::kG0_TC_Error_ConfirmId << 27) | kInterrupt_G0_AckId, 04092 kG0_TC_Interrupt_AckId = (tInterrupt_G0_Ack::kG0_TC_Interrupt_AckId << 27) | kInterrupt_G0_AckId, 04093 kG0_Gate_Interrupt_AckId = (tInterrupt_G0_Ack::kG0_Gate_Interrupt_AckId << 27) | kInterrupt_G0_AckId, 04094 04095 kInterrupt_G0_EnableId = 24, 04096 kG0_TC_Interrupt_EnableId = (tInterrupt_G0_Enable::kG0_TC_Interrupt_EnableId << 27) | kInterrupt_G0_EnableId, 04097 kG0_Gate_Interrupt_EnableId = (tInterrupt_G0_Enable::kG0_Gate_Interrupt_EnableId << 27) | kInterrupt_G0_EnableId, 04098 04099 kInterrupt_G1_AckId = 25, 04100 kG1_Gate_Error_ConfirmId = (tInterrupt_G1_Ack::kG1_Gate_Error_ConfirmId << 27) | kInterrupt_G1_AckId, 04101 kG1_TC_Error_ConfirmId = (tInterrupt_G1_Ack::kG1_TC_Error_ConfirmId << 27) | kInterrupt_G1_AckId, 04102 kG1_TC_Interrupt_AckId = (tInterrupt_G1_Ack::kG1_TC_Interrupt_AckId << 27) | kInterrupt_G1_AckId, 04103 kG1_Gate_Interrupt_AckId = (tInterrupt_G1_Ack::kG1_Gate_Interrupt_AckId << 27) | kInterrupt_G1_AckId, 04104 04105 kInterrupt_G1_EnableId = 26, 04106 kG1_TC_Interrupt_EnableId = (tInterrupt_G1_Enable::kG1_TC_Interrupt_EnableId << 27) | kInterrupt_G1_EnableId, 04107 kG1_Gate_Interrupt_EnableId = (tInterrupt_G1_Enable::kG1_Gate_Interrupt_EnableId << 27) | kInterrupt_G1_EnableId, 04108 04109 kG0_DMA_StatusId = 27, 04110 kG0_DMA_Read_ValueId = (tG0_DMA_Status::kG0_DMA_Read_ValueId << 27) | kG0_DMA_StatusId, 04111 kG0_DMA_Error_StId = (tG0_DMA_Status::kG0_DMA_Error_StId << 27) | kG0_DMA_StatusId, 04112 kG0_DRQ_StId = (tG0_DMA_Status::kG0_DRQ_StId << 27) | kG0_DMA_StatusId, 04113 04114 kG0_HW_SaveId = 28, 04115 kG0_HW_Save_ValueId = (tG0_HW_Save::kG0_HW_Save_ValueId << 27) | kG0_HW_SaveId, 04116 04117 kG0_HW_Save_HighId = 29, 04118 kG0_HW_Save_High_ValueId = (tG0_HW_Save_High::kG0_HW_Save_High_ValueId << 27) | kG0_HW_Save_HighId, 04119 04120 kG0_HW_Save_LowId = 30, 04121 kG0_HW_Save_Low_ValueId = (tG0_HW_Save_Low::kG0_HW_Save_Low_ValueId << 27) | kG0_HW_Save_LowId, 04122 04123 kG0_SaveId = 31, 04124 kG0_Save_ValueId = (tG0_Save::kG0_Save_ValueId << 27) | kG0_SaveId, 04125 04126 kG0_Save_HighId = 32, 04127 kG0_Save_High_ValueId = (tG0_Save_High::kG0_Save_High_ValueId << 27) | kG0_Save_HighId, 04128 04129 kG0_Save_LowId = 33, 04130 kG0_Save_Low_ValueId = (tG0_Save_Low::kG0_Save_Low_ValueId << 27) | kG0_Save_LowId, 04131 04132 kG0_Status_1Id = 34, 04133 kG0_Gate_Interrupt_StId = (tG0_Status_1::kG0_Gate_Interrupt_StId << 27) | kG0_Status_1Id, 04134 kG0_TC_StId = (tG0_Status_1::kG0_TC_StId << 27) | kG0_Status_1Id, 04135 kG0_Interrupt_StId = (tG0_Status_1::kG0_Interrupt_StId << 27) | kG0_Status_1Id, 04136 04137 kG01_Joint_Status_1Id = 35, 04138 kG0_Bank_StId = (tG01_Joint_Status_1::kG0_Bank_StId << 27) | kG01_Joint_Status_1Id, 04139 kG1_Bank_StId = (tG01_Joint_Status_1::kG1_Bank_StId << 27) | kG01_Joint_Status_1Id, 04140 kG0_Gate_StId = (tG01_Joint_Status_1::kG0_Gate_StId << 27) | kG01_Joint_Status_1Id, 04141 kG1_Gate_StId = (tG01_Joint_Status_1::kG1_Gate_StId << 27) | kG01_Joint_Status_1Id, 04142 kG01_DIO_Serial_IO_In_Progress_StId = (tG01_Joint_Status_1::kG01_DIO_Serial_IO_In_Progress_StId << 27) | kG01_Joint_Status_1Id, 04143 04144 kG01_Joint_Status_2Id = 36, 04145 kG0_Output_StId = (tG01_Joint_Status_2::kG0_Output_StId << 27) | kG01_Joint_Status_2Id, 04146 kG1_Output_StId = (tG01_Joint_Status_2::kG1_Output_StId << 27) | kG01_Joint_Status_2Id, 04147 kG0_HW_Save_StId = (tG01_Joint_Status_2::kG0_HW_Save_StId << 27) | kG01_Joint_Status_2Id, 04148 kG1_HW_Save_StId = (tG01_Joint_Status_2::kG1_HW_Save_StId << 27) | kG01_Joint_Status_2Id, 04149 kG0_Permanent_Stale_Data_StId = (tG01_Joint_Status_2::kG0_Permanent_Stale_Data_StId << 27) | kG01_Joint_Status_2Id, 04150 kG1_Permanent_Stale_Data_StId = (tG01_Joint_Status_2::kG1_Permanent_Stale_Data_StId << 27) | kG01_Joint_Status_2Id, 04151 04152 kG01_StatusId = 37, 04153 kG0_Save_StId = (tG01_Status::kG0_Save_StId << 27) | kG01_StatusId, 04154 kG1_Save_StId = (tG01_Status::kG1_Save_StId << 27) | kG01_StatusId, 04155 kG0_Counting_StId = (tG01_Status::kG0_Counting_StId << 27) | kG01_StatusId, 04156 kG1_Counting_StId = (tG01_Status::kG1_Counting_StId << 27) | kG01_StatusId, 04157 kG0_Next_Load_Source_StId = (tG01_Status::kG0_Next_Load_Source_StId << 27) | kG01_StatusId, 04158 kG1_Next_Load_Source_StId = (tG01_Status::kG1_Next_Load_Source_StId << 27) | kG01_StatusId, 04159 kG0_Stale_Data_StId = (tG01_Status::kG0_Stale_Data_StId << 27) | kG01_StatusId, 04160 kG1_Stale_Data_StId = (tG01_Status::kG1_Stale_Data_StId << 27) | kG01_StatusId, 04161 kG0_Armed_StId = (tG01_Status::kG0_Armed_StId << 27) | kG01_StatusId, 04162 kG1_Armed_StId = (tG01_Status::kG1_Armed_StId << 27) | kG01_StatusId, 04163 kG0_No_Load_Between_Gates_StId = (tG01_Status::kG0_No_Load_Between_Gates_StId << 27) | kG01_StatusId, 04164 kG1_No_Load_Between_Gates_StId = (tG01_Status::kG1_No_Load_Between_Gates_StId << 27) | kG01_StatusId, 04165 kG0_TC_Error_StId = (tG01_Status::kG0_TC_Error_StId << 27) | kG01_StatusId, 04166 kG1_TC_Error_StId = (tG01_Status::kG1_TC_Error_StId << 27) | kG01_StatusId, 04167 kG0_Gate_Error_StId = (tG01_Status::kG0_Gate_Error_StId << 27) | kG01_StatusId, 04168 kG1_Gate_Error_StId = (tG01_Status::kG1_Gate_Error_StId << 27) | kG01_StatusId, 04169 04170 kG1_DMA_StatusId = 38, 04171 kG1_DMA_Read_ValueId = (tG1_DMA_Status::kG1_DMA_Read_ValueId << 27) | kG1_DMA_StatusId, 04172 kG1_DMA_Error_StId = (tG1_DMA_Status::kG1_DMA_Error_StId << 27) | kG1_DMA_StatusId, 04173 kG1_DRQ_StId = (tG1_DMA_Status::kG1_DRQ_StId << 27) | kG1_DMA_StatusId, 04174 04175 kG1_HW_SaveId = 39, 04176 kG1_HW_Save_ValueId = (tG1_HW_Save::kG1_HW_Save_ValueId << 27) | kG1_HW_SaveId, 04177 04178 kG1_HW_Save_HighId = 40, 04179 kG1_HW_Save_High_ValueId = (tG1_HW_Save_High::kG1_HW_Save_High_ValueId << 27) | kG1_HW_Save_HighId, 04180 04181 kG1_HW_Save_LowId = 41, 04182 kG1_HW_Save_Low_ValueId = (tG1_HW_Save_Low::kG1_HW_Save_Low_ValueId << 27) | kG1_HW_Save_LowId, 04183 04184 kG1_SaveId = 42, 04185 kG1_Save_ValueId = (tG1_Save::kG1_Save_ValueId << 27) | kG1_SaveId, 04186 04187 kG1_Save_HighId = 43, 04188 kG1_Save_High_ValueId = (tG1_Save_High::kG1_Save_High_ValueId << 27) | kG1_Save_HighId, 04189 04190 kG1_Save_LowId = 44, 04191 kG1_Save_Low_ValueId = (tG1_Save_Low::kG1_Save_Low_ValueId << 27) | kG1_Save_LowId, 04192 04193 kG1_Status_1Id = 45, 04194 kG1_Gate_Interrupt_StId = (tG1_Status_1::kG1_Gate_Interrupt_StId << 27) | kG1_Status_1Id, 04195 kG1_TC_StId = (tG1_Status_1::kG1_TC_StId << 27) | kG1_Status_1Id, 04196 kG1_Interrupt_StId = (tG1_Status_1::kG1_Interrupt_StId << 27) | kG1_Status_1Id, 04197 04198 04199 kMaxRegisterId = 45 04200 04201 } tId; 04202 04203 tTIO(tBusSpaceReference addrSpace, nMDBG::tStatus2* statusChain = NULL); 04204 void reset(nMDBG::tStatus2* statusChain = NULL); 04205 virtual ~tTIO(); 04206 04207 inline tBusSpaceReference getBusSpaceReference(void) const; 04208 04209 inline void setAddressOffset(u32 value, nMDBG::tStatus2* statusChain = NULL); 04210 inline u32 getAddressOffset(nMDBG::tStatus2* statusChain = NULL); 04211 inline void flushBus(nMDBG::tStatus2* statusChain = NULL); 04212 private: 04213 void _initialize(nMDBG::tStatus2* statusChain = NULL); 04214 tBusSpaceReference _addrSpace; 04215 tBoolean _deallocateBus; 04216 u32 _addressOffset; 04217 04218 }; 04219 04220 #ifndef ___tTIO_ipp___ 04221 #ifndef ___tTIO_h_no_inline___ 04222 #include "tTIO_auto.cpp" 04223 #endif 04224 04225 #endif 04226 04227 #endif 04228 04229 04230 // !!!!!!!!!!!!!!!!!!!!!!!!!!!!! 04231 // This file is autogenerated!!! 04232 // !!!!!!!!!!!!!!!!!!!!!!!!!!!!! 04233
1.7.4 
