Go to the source code of this file.
Classes |
| struct | dt9812_flash_data_t |
| struct | dt9812_read_multi_t |
| struct | dt9812_write_byte_t |
| struct | dt9812_write_multi_t |
| struct | dt9812_rmw_byte_t |
| struct | dt9812_rmw_multi_t |
| struct | dt9812_usb_cmd |
Defines |
| #define | DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF |
| #define | DT9812_MAX_WRITE_CMD_PIPE_SIZE 32 |
| #define | DT9812_MAX_READ_CMD_PIPE_SIZE 32 |
| #define | F020_SFR_P4 0x84 |
| #define | F020_SFR_P1 0x90 |
| #define | F020_SFR_P2 0xa0 |
| #define | F020_SFR_P3 0xb0 |
| #define | F020_SFR_AMX0CF 0xba |
| #define | F020_SFR_AMX0SL 0xbb |
| #define | F020_SFR_ADC0CF 0xbc |
| #define | F020_SFR_ADC0L 0xbe |
| #define | F020_SFR_ADC0H 0xbf |
| #define | F020_SFR_DAC0L 0xd2 |
| #define | F020_SFR_DAC0H 0xd3 |
| #define | F020_SFR_DAC0CN 0xd4 |
| #define | F020_SFR_DAC1L 0xd5 |
| #define | F020_SFR_DAC1H 0xd6 |
| #define | F020_SFR_DAC1CN 0xd7 |
| #define | F020_SFR_ADC0CN 0xe8 |
| #define | F020_MASK_ADC0CF_AMP0GN0 0x01 |
| #define | F020_MASK_ADC0CF_AMP0GN1 0x02 |
| #define | F020_MASK_ADC0CF_AMP0GN2 0x04 |
| #define | F020_MASK_ADC0CN_AD0EN 0x80 |
| #define | F020_MASK_ADC0CN_AD0INT 0x20 |
| #define | F020_MASK_ADC0CN_AD0BUSY 0x10 |
| #define | F020_MASK_DACxCN_DACxEN 0x80 |
| #define | DT9812_MAX_NUM_MULTI_BYTE_RDS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8)) |
| #define | DT9812_MAX_NUM_MULTI_BYTE_WRTS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t)) |
| #define | DT9812_MAX_NUM_MULTI_BYTE_RMWS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t)) |
Typedefs |
| typedef struct dt9812_usb_cmd | dt9812_usb_cmd_t |
Enumerations |
| enum | dt9812_devid_t { DT9812_DEVID_DT9812_10,
DT9812_DEVID_DT9812_2PT5
} |
| enum | dt9812_gain_t {
DT9812_GAIN_0PT25 = 1,
DT9812_GAIN_0PT5 = 2,
DT9812_GAIN_1 = 4,
DT9812_GAIN_2 = 8,
DT9812_GAIN_4 = 16,
DT9812_GAIN_8 = 32,
DT9812_GAIN_16 = 64
} |
| enum | dt9812_usb_firmware_cmd_t {
DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
DT9812_W_FLASH_DATA = 0,
DT9812_R_FLASH_DATA = 1,
DT9812_R_SINGLE_BYTE_REG = 2,
DT9812_W_SINGLE_BYTE_REG = 3,
DT9812_R_MULTI_BYTE_REG = 4,
DT9812_W_MULTI_BYTE_REG = 5,
DT9812_RMW_SINGLE_BYTE_REG = 6,
DT9812_RMW_MULTI_BYTE_REG = 7,
DT9812_R_SINGLE_BYTE_SMBUS = 8,
DT9812_W_SINGLE_BYTE_SMBUS = 9,
DT9812_R_MULTI_BYTE_SMBUS = 10,
DT9812_W_MULTI_BYTE_SMBUS = 11,
DT9812_R_SINGLE_BYTE_DEV = 12,
DT9812_W_SINGLE_BYTE_DEV = 13,
DT9812_R_MULTI_BYTE_DEV = 14,
DT9812_W_MULTI_BYTE_DEV = 15,
DT9812_W_DAC_THRESHOLD = 16,
DT9812_W_INT_ON_CHANGE_MASK = 17,
DT9812_W_CGL = 18,
DT9812_R_MULTI_BYTE_USBMEM = 19,
DT9812_W_MULTI_BYTE_USBMEM = 20,
DT9812_START_SUBSYSTEM = 21,
DT9812_STOP_SUBSYSTEM = 22,
DT9812_CALIBRATE_POT = 23,
DT9812_W_DAC_FIFO_SIZE = 24,
DT9812_W_CGL_DAC = 25,
DT9812_R_SINGLE_VALUE_CMD = 26,
DT9812_W_SINGLE_VALUE_CMD = 27,
DT9812_MAX_USB_FIRMWARE_CMD_CODE
} |
Define Documentation
| #define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF |
| #define DT9812_MAX_NUM_MULTI_BYTE_RDS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8)) |
| #define DT9812_MAX_NUM_MULTI_BYTE_RMWS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t)) |
| #define DT9812_MAX_NUM_MULTI_BYTE_WRTS ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t)) |
| #define DT9812_MAX_READ_CMD_PIPE_SIZE 32 |
| #define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32 |
| #define F020_MASK_ADC0CF_AMP0GN0 0x01 |
| #define F020_MASK_ADC0CF_AMP0GN1 0x02 |
| #define F020_MASK_ADC0CF_AMP0GN2 0x04 |
| #define F020_MASK_ADC0CN_AD0BUSY 0x10 |
| #define F020_MASK_ADC0CN_AD0EN 0x80 |
| #define F020_MASK_ADC0CN_AD0INT 0x20 |
| #define F020_MASK_DACxCN_DACxEN 0x80 |
| #define F020_SFR_ADC0CF 0xbc |
| #define F020_SFR_ADC0CN 0xe8 |
| #define F020_SFR_ADC0H 0xbf |
| #define F020_SFR_ADC0L 0xbe |
| #define F020_SFR_AMX0CF 0xba |
| #define F020_SFR_AMX0SL 0xbb |
| #define F020_SFR_DAC0CN 0xd4 |
| #define F020_SFR_DAC0H 0xd3 |
| #define F020_SFR_DAC0L 0xd2 |
| #define F020_SFR_DAC1CN 0xd7 |
| #define F020_SFR_DAC1H 0xd6 |
| #define F020_SFR_DAC1L 0xd5 |
Typedef Documentation
Enumeration Type Documentation
- Enumerator:
| DT9812_DEVID_DT9812_10 |
|
| DT9812_DEVID_DT9812_2PT5 |
|
Definition at line 38 of file dt9812.h.
- Enumerator:
| DT9812_GAIN_0PT25 |
|
| DT9812_GAIN_0PT5 |
|
| DT9812_GAIN_1 |
|
| DT9812_GAIN_2 |
|
| DT9812_GAIN_4 |
|
| DT9812_GAIN_8 |
|
| DT9812_GAIN_16 |
|
Definition at line 47 of file dt9812.h.
- Enumerator:
| DT9812_LEAST_USB_FIRMWARE_CMD_CODE |
|
| DT9812_W_FLASH_DATA |
|
| DT9812_R_FLASH_DATA |
|
| DT9812_R_SINGLE_BYTE_REG |
|
| DT9812_W_SINGLE_BYTE_REG |
|
| DT9812_R_MULTI_BYTE_REG |
|
| DT9812_W_MULTI_BYTE_REG |
|
| DT9812_RMW_SINGLE_BYTE_REG |
|
| DT9812_RMW_MULTI_BYTE_REG |
|
| DT9812_R_SINGLE_BYTE_SMBUS |
|
| DT9812_W_SINGLE_BYTE_SMBUS |
|
| DT9812_R_MULTI_BYTE_SMBUS |
|
| DT9812_W_MULTI_BYTE_SMBUS |
|
| DT9812_R_SINGLE_BYTE_DEV |
|
| DT9812_W_SINGLE_BYTE_DEV |
|
| DT9812_R_MULTI_BYTE_DEV |
|
| DT9812_W_MULTI_BYTE_DEV |
|
| DT9812_W_DAC_THRESHOLD |
|
| DT9812_W_INT_ON_CHANGE_MASK |
|
| DT9812_W_CGL |
|
| DT9812_R_MULTI_BYTE_USBMEM |
|
| DT9812_W_MULTI_BYTE_USBMEM |
|
| DT9812_START_SUBSYSTEM |
|
| DT9812_STOP_SUBSYSTEM |
|
| DT9812_CALIBRATE_POT |
|
| DT9812_W_DAC_FIFO_SIZE |
|
| DT9812_W_CGL_DAC |
|
| DT9812_R_SINGLE_VALUE_CMD |
|
| DT9812_W_SINGLE_VALUE_CMD |
|
| DT9812_MAX_USB_FIRMWARE_CMD_CODE |
|
Definition at line 57 of file dt9812.h.
1.7.4 
