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RTXI 1.3
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RTXI 1.3
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#include <tTIO.h>
Classes | |
| class | tG01_Joint_Reset |
| class | tG01_Joint_Status_1 |
| class | tG01_Joint_Status_2 |
| class | tG01_Status |
| class | tG0_AutoIncrement |
| class | tG0_Command |
| class | tG0_Counting_Mode |
| class | tG0_DMA_Control |
| class | tG0_DMA_Status |
| class | tG0_HW_Save |
| class | tG0_HW_Save_High |
| class | tG0_HW_Save_Low |
| class | tG0_Input_Select |
| class | tG0_Load_A |
| class | tG0_Load_B |
| class | tG0_Mode |
| class | tG0_MSeries_ABZ |
| class | tG0_MSeries_Counting_Mode |
| class | tG0_Save |
| class | tG0_Save_High |
| class | tG0_Save_Low |
| class | tG0_Second_Gate |
| class | tG0_Status_1 |
| class | tG1_AutoIncrement |
| class | tG1_Command |
| class | tG1_Counting_Mode |
| class | tG1_DMA_Control |
| class | tG1_DMA_Status |
| class | tG1_HW_Save |
| class | tG1_HW_Save_High |
| class | tG1_HW_Save_Low |
| class | tG1_Input_Select |
| class | tG1_Load_A |
| class | tG1_Load_B |
| class | tG1_Mode |
| class | tG1_MSeries_ABZ |
| class | tG1_MSeries_Counting_Mode |
| class | tG1_Save |
| class | tG1_Save_High |
| class | tG1_Save_Low |
| class | tG1_Second_Gate |
| class | tG1_Status_1 |
| class | tInterrupt_G0_Ack |
| class | tInterrupt_G0_Enable |
| class | tInterrupt_G1_Ack |
| class | tInterrupt_G1_Enable |
| class | tReg16IODirect32 |
| class | tReg32IODirect32 |
Public Types | |
| enum | tId { kG0_AutoIncrementId = 0, kG0_AutoIncrementDefaultId = (tG0_AutoIncrement::kDefaultId << 27) | kG0_AutoIncrementId, kG0_CommandId = 1, kG0_ArmId = (tG0_Command::kG0_ArmId << 27) | kG0_CommandId, kG0_Save_TraceId = (tG0_Command::kG0_Save_TraceId << 27) | kG0_CommandId, kG0_LoadId = (tG0_Command::kG0_LoadId << 27) | kG0_CommandId, kG0_DisarmId = (tG0_Command::kG0_DisarmId << 27) | kG0_CommandId, kG0_Up_DownId = (tG0_Command::kG0_Up_DownId << 27) | kG0_CommandId, kG0_Write_SwitchId = (tG0_Command::kG0_Write_SwitchId << 27) | kG0_CommandId, kG0_Synchronized_GateId = (tG0_Command::kG0_Synchronized_GateId << 27) | kG0_CommandId, kG0_Little_Big_EndianId = (tG0_Command::kG0_Little_Big_EndianId << 27) | kG0_CommandId, kG0_Bank_Switch_StartId = (tG0_Command::kG0_Bank_Switch_StartId << 27) | kG0_CommandId, kG0_Bank_Switch_ModeId = (tG0_Command::kG0_Bank_Switch_ModeId << 27) | kG0_CommandId, kG0_Bank_Switch_EnableId = (tG0_Command::kG0_Bank_Switch_EnableId << 27) | kG0_CommandId, kG1_Arm_CopyId = (tG0_Command::kG1_Arm_CopyId << 27) | kG0_CommandId, kG1_Save_Trace_CopyId = (tG0_Command::kG1_Save_Trace_CopyId << 27) | kG0_CommandId, kG1_Disarm_CopyId = (tG0_Command::kG1_Disarm_CopyId << 27) | kG0_CommandId, kG0_Counting_ModeId = 2, kG0_Encoder_Counting_ModeId = (tG0_Counting_Mode::kG0_Encoder_Counting_ModeId << 27) | kG0_Counting_ModeId, kG0_Index_EnableId = (tG0_Counting_Mode::kG0_Index_EnableId << 27) | kG0_Counting_ModeId, kG0_Index_PhaseId = (tG0_Counting_Mode::kG0_Index_PhaseId << 27) | kG0_Counting_ModeId, kG0_HW_Arm_EnableId = (tG0_Counting_Mode::kG0_HW_Arm_EnableId << 27) | kG0_Counting_ModeId, kG0_HW_Arm_SelectId = (tG0_Counting_Mode::kG0_HW_Arm_SelectId << 27) | kG0_Counting_ModeId, kG0_PrescaleId = (tG0_Counting_Mode::kG0_PrescaleId << 27) | kG0_Counting_ModeId, kG0_Alternate_SynchronizationId = (tG0_Counting_Mode::kG0_Alternate_SynchronizationId << 27) | kG0_Counting_ModeId, kG0_Prescale_By_2Id = (tG0_Counting_Mode::kG0_Prescale_By_2Id << 27) | kG0_Counting_ModeId, kG0_MSeries_Counting_ModeId = 3, kG0_MSeries_Encoder_Counting_ModeId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Encoder_Counting_ModeId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_Index_EnableId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Index_EnableId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_Index_PhaseId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Index_PhaseId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_HW_Arm_EnableId = (tG0_MSeries_Counting_Mode::kG0_MSeries_HW_Arm_EnableId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_HW_Arm_SelectId = (tG0_MSeries_Counting_Mode::kG0_MSeries_HW_Arm_SelectId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_PrescaleId = (tG0_MSeries_Counting_Mode::kG0_MSeries_PrescaleId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_Alternate_SynchronizationId = (tG0_MSeries_Counting_Mode::kG0_MSeries_Alternate_SynchronizationId << 27) | kG0_MSeries_Counting_ModeId, kG0_MSeries_Prescale_By_2Id = (tG0_MSeries_Counting_Mode::kG0_MSeries_Prescale_By_2Id << 27) | kG0_MSeries_Counting_ModeId, kG0_DMA_ControlId = 4, kG0_DMA_EnableId = (tG0_DMA_Control::kG0_DMA_EnableId << 27) | kG0_DMA_ControlId, kG0_DMA_Output_EnableId = (tG0_DMA_Control::kG0_DMA_Output_EnableId << 27) | kG0_DMA_ControlId, kG0_DMA_Int_EnableId = (tG0_DMA_Control::kG0_DMA_Int_EnableId << 27) | kG0_DMA_ControlId, kG0_Input_SelectId = 5, kG0_Read_Acknowledges_IrqId = (tG0_Input_Select::kG0_Read_Acknowledges_IrqId << 27) | kG0_Input_SelectId, kG0_Write_Acknowledges_IrqId = (tG0_Input_Select::kG0_Write_Acknowledges_IrqId << 27) | kG0_Input_SelectId, kG0_Source_SelectId = (tG0_Input_Select::kG0_Source_SelectId << 27) | kG0_Input_SelectId, kG0_Gate_SelectId = (tG0_Input_Select::kG0_Gate_SelectId << 27) | kG0_Input_SelectId, kG0_Gate_Select_Load_SourceId = (tG0_Input_Select::kG0_Gate_Select_Load_SourceId << 27) | kG0_Input_SelectId, kG0_OR_GateId = (tG0_Input_Select::kG0_OR_GateId << 27) | kG0_Input_SelectId, kG0_Output_PolarityId = (tG0_Input_Select::kG0_Output_PolarityId << 27) | kG0_Input_SelectId, kG0_Source_PolarityId = (tG0_Input_Select::kG0_Source_PolarityId << 27) | kG0_Input_SelectId, kG0_Load_AId = 6, kG0_Load_ADefaultId = (tG0_Load_A::kDefaultId << 27) | kG0_Load_AId, kG0_Load_BId = 7, kG0_Load_BDefaultId = (tG0_Load_B::kDefaultId << 27) | kG0_Load_BId, kG0_ModeId = 8, kG0_Gating_ModeId = (tG0_Mode::kG0_Gating_ModeId << 27) | kG0_ModeId, kG0_Gate_On_Both_EdgesId = (tG0_Mode::kG0_Gate_On_Both_EdgesId << 27) | kG0_ModeId, kG0_Trigger_Mode_For_Edge_GateId = (tG0_Mode::kG0_Trigger_Mode_For_Edge_GateId << 27) | kG0_ModeId, kG0_Stop_ModeId = (tG0_Mode::kG0_Stop_ModeId << 27) | kG0_ModeId, kG0_Load_Source_SelectId = (tG0_Mode::kG0_Load_Source_SelectId << 27) | kG0_ModeId, kG0_Output_ModeId = (tG0_Mode::kG0_Output_ModeId << 27) | kG0_ModeId, kG0_Counting_OnceId = (tG0_Mode::kG0_Counting_OnceId << 27) | kG0_ModeId, kG0_Loading_On_TCId = (tG0_Mode::kG0_Loading_On_TCId << 27) | kG0_ModeId, kG0_Gate_PolarityId = (tG0_Mode::kG0_Gate_PolarityId << 27) | kG0_ModeId, kG0_Loading_On_GateId = (tG0_Mode::kG0_Loading_On_GateId << 27) | kG0_ModeId, kG0_Reload_Source_SwitchingId = (tG0_Mode::kG0_Reload_Source_SwitchingId << 27) | kG0_ModeId, kG0_Second_GateId = 9, kG0_Second_Gate_Gating_ModeId = (tG0_Second_Gate::kG0_Second_Gate_Gating_ModeId << 27) | kG0_Second_GateId, kG0_Second_Gate_SelectId = (tG0_Second_Gate::kG0_Second_Gate_SelectId << 27) | kG0_Second_GateId, kG0_Second_Gate_PolarityId = (tG0_Second_Gate::kG0_Second_Gate_PolarityId << 27) | kG0_Second_GateId, kG0_MSeries_Second_Gate_SubSelectId = (tG0_Second_Gate::kG0_MSeries_Second_Gate_SubSelectId << 27) | kG0_Second_GateId, kG0_MSeries_Source_SubSelectId = (tG0_Second_Gate::kG0_MSeries_Source_SubSelectId << 27) | kG0_Second_GateId, kG0_MSeries_ABZId = 10, kG0_Z_SelectId = (tG0_MSeries_ABZ::kG0_Z_SelectId << 27) | kG0_MSeries_ABZId, kG0_B_SelectId = (tG0_MSeries_ABZ::kG0_B_SelectId << 27) | kG0_MSeries_ABZId, kG0_A_SelectId = (tG0_MSeries_ABZ::kG0_A_SelectId << 27) | kG0_MSeries_ABZId, kG01_Joint_ResetId = 11, kG0_ResetId = (tG01_Joint_Reset::kG0_ResetId << 27) | kG01_Joint_ResetId, kG1_ResetId = (tG01_Joint_Reset::kG1_ResetId << 27) | kG01_Joint_ResetId, kG1_AutoIncrementId = 12, kG1_AutoIncrementDefaultId = (tG1_AutoIncrement::kDefaultId << 27) | kG1_AutoIncrementId, kG1_CommandId = 13, kG1_ArmId = (tG1_Command::kG1_ArmId << 27) | kG1_CommandId, kG1_Save_TraceId = (tG1_Command::kG1_Save_TraceId << 27) | kG1_CommandId, kG1_LoadId = (tG1_Command::kG1_LoadId << 27) | kG1_CommandId, kG1_DisarmId = (tG1_Command::kG1_DisarmId << 27) | kG1_CommandId, kG1_Up_DownId = (tG1_Command::kG1_Up_DownId << 27) | kG1_CommandId, kG1_Write_SwitchId = (tG1_Command::kG1_Write_SwitchId << 27) | kG1_CommandId, kG1_Synchronized_GateId = (tG1_Command::kG1_Synchronized_GateId << 27) | kG1_CommandId, kG1_Little_Big_EndianId = (tG1_Command::kG1_Little_Big_EndianId << 27) | kG1_CommandId, kG1_Bank_Switch_StartId = (tG1_Command::kG1_Bank_Switch_StartId << 27) | kG1_CommandId, kG1_Bank_Switch_ModeId = (tG1_Command::kG1_Bank_Switch_ModeId << 27) | kG1_CommandId, kG1_Bank_Switch_EnableId = (tG1_Command::kG1_Bank_Switch_EnableId << 27) | kG1_CommandId, kG0_Arm_CopyId = (tG1_Command::kG0_Arm_CopyId << 27) | kG1_CommandId, kG0_Save_Trace_CopyId = (tG1_Command::kG0_Save_Trace_CopyId << 27) | kG1_CommandId, kG0_Disarm_CopyId = (tG1_Command::kG0_Disarm_CopyId << 27) | kG1_CommandId, kG1_Counting_ModeId = 14, kG1_Encoder_Counting_ModeId = (tG1_Counting_Mode::kG1_Encoder_Counting_ModeId << 27) | kG1_Counting_ModeId, kG1_Index_EnableId = (tG1_Counting_Mode::kG1_Index_EnableId << 27) | kG1_Counting_ModeId, kG1_Index_PhaseId = (tG1_Counting_Mode::kG1_Index_PhaseId << 27) | kG1_Counting_ModeId, kG1_HW_Arm_EnableId = (tG1_Counting_Mode::kG1_HW_Arm_EnableId << 27) | kG1_Counting_ModeId, kG1_HW_Arm_SelectId = (tG1_Counting_Mode::kG1_HW_Arm_SelectId << 27) | kG1_Counting_ModeId, kG1_PrescaleId = (tG1_Counting_Mode::kG1_PrescaleId << 27) | kG1_Counting_ModeId, kG1_Alternate_SynchronizationId = (tG1_Counting_Mode::kG1_Alternate_SynchronizationId << 27) | kG1_Counting_ModeId, kG1_Prescale_By_2Id = (tG1_Counting_Mode::kG1_Prescale_By_2Id << 27) | kG1_Counting_ModeId, kG1_MSeries_Counting_ModeId = 15, kG1_MSeries_Encoder_Counting_ModeId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Encoder_Counting_ModeId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_Index_EnableId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Index_EnableId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_Index_PhaseId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Index_PhaseId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_HW_Arm_EnableId = (tG1_MSeries_Counting_Mode::kG1_MSeries_HW_Arm_EnableId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_HW_Arm_SelectId = (tG1_MSeries_Counting_Mode::kG1_MSeries_HW_Arm_SelectId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_PrescaleId = (tG1_MSeries_Counting_Mode::kG1_MSeries_PrescaleId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_Alternate_SynchronizationId = (tG1_MSeries_Counting_Mode::kG1_MSeries_Alternate_SynchronizationId << 27) | kG1_MSeries_Counting_ModeId, kG1_MSeries_Prescale_By_2Id = (tG1_MSeries_Counting_Mode::kG1_MSeries_Prescale_By_2Id << 27) | kG1_MSeries_Counting_ModeId, kG1_DMA_ControlId = 16, kG1_DMA_EnableId = (tG1_DMA_Control::kG1_DMA_EnableId << 27) | kG1_DMA_ControlId, kG1_DMA_Output_EnableId = (tG1_DMA_Control::kG1_DMA_Output_EnableId << 27) | kG1_DMA_ControlId, kG1_DMA_Int_EnableId = (tG1_DMA_Control::kG1_DMA_Int_EnableId << 27) | kG1_DMA_ControlId, kG1_Input_SelectId = 17, kG1_Read_Acknowledges_IrqId = (tG1_Input_Select::kG1_Read_Acknowledges_IrqId << 27) | kG1_Input_SelectId, kG1_Write_Acknowledges_IrqId = (tG1_Input_Select::kG1_Write_Acknowledges_IrqId << 27) | kG1_Input_SelectId, kG1_Source_SelectId = (tG1_Input_Select::kG1_Source_SelectId << 27) | kG1_Input_SelectId, kG1_Gate_SelectId = (tG1_Input_Select::kG1_Gate_SelectId << 27) | kG1_Input_SelectId, kG1_Gate_Select_Load_SourceId = (tG1_Input_Select::kG1_Gate_Select_Load_SourceId << 27) | kG1_Input_SelectId, kG1_OR_GateId = (tG1_Input_Select::kG1_OR_GateId << 27) | kG1_Input_SelectId, kG1_Output_PolarityId = (tG1_Input_Select::kG1_Output_PolarityId << 27) | kG1_Input_SelectId, kG1_Source_PolarityId = (tG1_Input_Select::kG1_Source_PolarityId << 27) | kG1_Input_SelectId, kG1_Load_AId = 18, kG1_Load_ADefaultId = (tG1_Load_A::kDefaultId << 27) | kG1_Load_AId, kG1_Load_BId = 19, kG1_Load_BDefaultId = (tG1_Load_B::kDefaultId << 27) | kG1_Load_BId, kG1_ModeId = 20, kG1_Gating_ModeId = (tG1_Mode::kG1_Gating_ModeId << 27) | kG1_ModeId, kG1_Gate_On_Both_EdgesId = (tG1_Mode::kG1_Gate_On_Both_EdgesId << 27) | kG1_ModeId, kG1_Trigger_Mode_For_Edge_GateId = (tG1_Mode::kG1_Trigger_Mode_For_Edge_GateId << 27) | kG1_ModeId, kG1_Stop_ModeId = (tG1_Mode::kG1_Stop_ModeId << 27) | kG1_ModeId, kG1_Load_Source_SelectId = (tG1_Mode::kG1_Load_Source_SelectId << 27) | kG1_ModeId, kG1_Output_ModeId = (tG1_Mode::kG1_Output_ModeId << 27) | kG1_ModeId, kG1_Counting_OnceId = (tG1_Mode::kG1_Counting_OnceId << 27) | kG1_ModeId, kG1_Loading_On_TCId = (tG1_Mode::kG1_Loading_On_TCId << 27) | kG1_ModeId, kG1_Gate_PolarityId = (tG1_Mode::kG1_Gate_PolarityId << 27) | kG1_ModeId, kG1_Loading_On_GateId = (tG1_Mode::kG1_Loading_On_GateId << 27) | kG1_ModeId, kG1_Reload_Source_SwitchingId = (tG1_Mode::kG1_Reload_Source_SwitchingId << 27) | kG1_ModeId, kG1_Second_GateId = 21, kG1_Second_Gate_Gating_ModeId = (tG1_Second_Gate::kG1_Second_Gate_Gating_ModeId << 27) | kG1_Second_GateId, kG1_Second_Gate_SelectId = (tG1_Second_Gate::kG1_Second_Gate_SelectId << 27) | kG1_Second_GateId, kG1_Second_Gate_PolarityId = (tG1_Second_Gate::kG1_Second_Gate_PolarityId << 27) | kG1_Second_GateId, kG1_MSeries_Second_Gate_SubSelectId = (tG1_Second_Gate::kG1_MSeries_Second_Gate_SubSelectId << 27) | kG1_Second_GateId, kG1_MSeries_Source_SubSelectId = (tG1_Second_Gate::kG1_MSeries_Source_SubSelectId << 27) | kG1_Second_GateId, kG1_MSeries_ABZId = 22, kG1_Z_SelectId = (tG1_MSeries_ABZ::kG1_Z_SelectId << 27) | kG1_MSeries_ABZId, kG1_B_SelectId = (tG1_MSeries_ABZ::kG1_B_SelectId << 27) | kG1_MSeries_ABZId, kG1_A_SelectId = (tG1_MSeries_ABZ::kG1_A_SelectId << 27) | kG1_MSeries_ABZId, kInterrupt_G0_AckId = 23, kG0_Gate_Error_ConfirmId = (tInterrupt_G0_Ack::kG0_Gate_Error_ConfirmId << 27) | kInterrupt_G0_AckId, kG0_TC_Error_ConfirmId = (tInterrupt_G0_Ack::kG0_TC_Error_ConfirmId << 27) | kInterrupt_G0_AckId, kG0_TC_Interrupt_AckId = (tInterrupt_G0_Ack::kG0_TC_Interrupt_AckId << 27) | kInterrupt_G0_AckId, kG0_Gate_Interrupt_AckId = (tInterrupt_G0_Ack::kG0_Gate_Interrupt_AckId << 27) | kInterrupt_G0_AckId, kInterrupt_G0_EnableId = 24, kG0_TC_Interrupt_EnableId = (tInterrupt_G0_Enable::kG0_TC_Interrupt_EnableId << 27) | kInterrupt_G0_EnableId, kG0_Gate_Interrupt_EnableId = (tInterrupt_G0_Enable::kG0_Gate_Interrupt_EnableId << 27) | kInterrupt_G0_EnableId, kInterrupt_G1_AckId = 25, kG1_Gate_Error_ConfirmId = (tInterrupt_G1_Ack::kG1_Gate_Error_ConfirmId << 27) | kInterrupt_G1_AckId, kG1_TC_Error_ConfirmId = (tInterrupt_G1_Ack::kG1_TC_Error_ConfirmId << 27) | kInterrupt_G1_AckId, kG1_TC_Interrupt_AckId = (tInterrupt_G1_Ack::kG1_TC_Interrupt_AckId << 27) | kInterrupt_G1_AckId, kG1_Gate_Interrupt_AckId = (tInterrupt_G1_Ack::kG1_Gate_Interrupt_AckId << 27) | kInterrupt_G1_AckId, kInterrupt_G1_EnableId = 26, kG1_TC_Interrupt_EnableId = (tInterrupt_G1_Enable::kG1_TC_Interrupt_EnableId << 27) | kInterrupt_G1_EnableId, kG1_Gate_Interrupt_EnableId = (tInterrupt_G1_Enable::kG1_Gate_Interrupt_EnableId << 27) | kInterrupt_G1_EnableId, kG0_DMA_StatusId = 27, kG0_DMA_Read_ValueId = (tG0_DMA_Status::kG0_DMA_Read_ValueId << 27) | kG0_DMA_StatusId, kG0_DMA_Error_StId = (tG0_DMA_Status::kG0_DMA_Error_StId << 27) | kG0_DMA_StatusId, kG0_DRQ_StId = (tG0_DMA_Status::kG0_DRQ_StId << 27) | kG0_DMA_StatusId, kG0_HW_SaveId = 28, kG0_HW_Save_ValueId = (tG0_HW_Save::kG0_HW_Save_ValueId << 27) | kG0_HW_SaveId, kG0_HW_Save_HighId = 29, kG0_HW_Save_High_ValueId = (tG0_HW_Save_High::kG0_HW_Save_High_ValueId << 27) | kG0_HW_Save_HighId, kG0_HW_Save_LowId = 30, kG0_HW_Save_Low_ValueId = (tG0_HW_Save_Low::kG0_HW_Save_Low_ValueId << 27) | kG0_HW_Save_LowId, kG0_SaveId = 31, kG0_Save_ValueId = (tG0_Save::kG0_Save_ValueId << 27) | kG0_SaveId, kG0_Save_HighId = 32, kG0_Save_High_ValueId = (tG0_Save_High::kG0_Save_High_ValueId << 27) | kG0_Save_HighId, kG0_Save_LowId = 33, kG0_Save_Low_ValueId = (tG0_Save_Low::kG0_Save_Low_ValueId << 27) | kG0_Save_LowId, kG0_Status_1Id = 34, kG0_Gate_Interrupt_StId = (tG0_Status_1::kG0_Gate_Interrupt_StId << 27) | kG0_Status_1Id, kG0_TC_StId = (tG0_Status_1::kG0_TC_StId << 27) | kG0_Status_1Id, kG0_Interrupt_StId = (tG0_Status_1::kG0_Interrupt_StId << 27) | kG0_Status_1Id, kG01_Joint_Status_1Id = 35, kG0_Bank_StId = (tG01_Joint_Status_1::kG0_Bank_StId << 27) | kG01_Joint_Status_1Id, kG1_Bank_StId = (tG01_Joint_Status_1::kG1_Bank_StId << 27) | kG01_Joint_Status_1Id, kG0_Gate_StId = (tG01_Joint_Status_1::kG0_Gate_StId << 27) | kG01_Joint_Status_1Id, kG1_Gate_StId = (tG01_Joint_Status_1::kG1_Gate_StId << 27) | kG01_Joint_Status_1Id, kG01_DIO_Serial_IO_In_Progress_StId = (tG01_Joint_Status_1::kG01_DIO_Serial_IO_In_Progress_StId << 27) | kG01_Joint_Status_1Id, kG01_Joint_Status_2Id = 36, kG0_Output_StId = (tG01_Joint_Status_2::kG0_Output_StId << 27) | kG01_Joint_Status_2Id, kG1_Output_StId = (tG01_Joint_Status_2::kG1_Output_StId << 27) | kG01_Joint_Status_2Id, kG0_HW_Save_StId = (tG01_Joint_Status_2::kG0_HW_Save_StId << 27) | kG01_Joint_Status_2Id, kG1_HW_Save_StId = (tG01_Joint_Status_2::kG1_HW_Save_StId << 27) | kG01_Joint_Status_2Id, kG0_Permanent_Stale_Data_StId = (tG01_Joint_Status_2::kG0_Permanent_Stale_Data_StId << 27) | kG01_Joint_Status_2Id, kG1_Permanent_Stale_Data_StId = (tG01_Joint_Status_2::kG1_Permanent_Stale_Data_StId << 27) | kG01_Joint_Status_2Id, kG01_StatusId = 37, kG0_Save_StId = (tG01_Status::kG0_Save_StId << 27) | kG01_StatusId, kG1_Save_StId = (tG01_Status::kG1_Save_StId << 27) | kG01_StatusId, kG0_Counting_StId = (tG01_Status::kG0_Counting_StId << 27) | kG01_StatusId, kG1_Counting_StId = (tG01_Status::kG1_Counting_StId << 27) | kG01_StatusId, kG0_Next_Load_Source_StId = (tG01_Status::kG0_Next_Load_Source_StId << 27) | kG01_StatusId, kG1_Next_Load_Source_StId = (tG01_Status::kG1_Next_Load_Source_StId << 27) | kG01_StatusId, kG0_Stale_Data_StId = (tG01_Status::kG0_Stale_Data_StId << 27) | kG01_StatusId, kG1_Stale_Data_StId = (tG01_Status::kG1_Stale_Data_StId << 27) | kG01_StatusId, kG0_Armed_StId = (tG01_Status::kG0_Armed_StId << 27) | kG01_StatusId, kG1_Armed_StId = (tG01_Status::kG1_Armed_StId << 27) | kG01_StatusId, kG0_No_Load_Between_Gates_StId = (tG01_Status::kG0_No_Load_Between_Gates_StId << 27) | kG01_StatusId, kG1_No_Load_Between_Gates_StId = (tG01_Status::kG1_No_Load_Between_Gates_StId << 27) | kG01_StatusId, kG0_TC_Error_StId = (tG01_Status::kG0_TC_Error_StId << 27) | kG01_StatusId, kG1_TC_Error_StId = (tG01_Status::kG1_TC_Error_StId << 27) | kG01_StatusId, kG0_Gate_Error_StId = (tG01_Status::kG0_Gate_Error_StId << 27) | kG01_StatusId, kG1_Gate_Error_StId = (tG01_Status::kG1_Gate_Error_StId << 27) | kG01_StatusId, kG1_DMA_StatusId = 38, kG1_DMA_Read_ValueId = (tG1_DMA_Status::kG1_DMA_Read_ValueId << 27) | kG1_DMA_StatusId, kG1_DMA_Error_StId = (tG1_DMA_Status::kG1_DMA_Error_StId << 27) | kG1_DMA_StatusId, kG1_DRQ_StId = (tG1_DMA_Status::kG1_DRQ_StId << 27) | kG1_DMA_StatusId, kG1_HW_SaveId = 39, kG1_HW_Save_ValueId = (tG1_HW_Save::kG1_HW_Save_ValueId << 27) | kG1_HW_SaveId, kG1_HW_Save_HighId = 40, kG1_HW_Save_High_ValueId = (tG1_HW_Save_High::kG1_HW_Save_High_ValueId << 27) | kG1_HW_Save_HighId, kG1_HW_Save_LowId = 41, kG1_HW_Save_Low_ValueId = (tG1_HW_Save_Low::kG1_HW_Save_Low_ValueId << 27) | kG1_HW_Save_LowId, kG1_SaveId = 42, kG1_Save_ValueId = (tG1_Save::kG1_Save_ValueId << 27) | kG1_SaveId, kG1_Save_HighId = 43, kG1_Save_High_ValueId = (tG1_Save_High::kG1_Save_High_ValueId << 27) | kG1_Save_HighId, kG1_Save_LowId = 44, kG1_Save_Low_ValueId = (tG1_Save_Low::kG1_Save_Low_ValueId << 27) | kG1_Save_LowId, kG1_Status_1Id = 45, kG1_Gate_Interrupt_StId = (tG1_Status_1::kG1_Gate_Interrupt_StId << 27) | kG1_Status_1Id, kG1_TC_StId = (tG1_Status_1::kG1_TC_StId << 27) | kG1_Status_1Id, kG1_Interrupt_StId = (tG1_Status_1::kG1_Interrupt_StId << 27) | kG1_Status_1Id, kMaxRegisterId = 45 } |
Public Member Functions | |
| tTIO (tBusSpaceReference addrSpace, nMDBG::tStatus2 *statusChain=NULL) | |
| void | reset (nMDBG::tStatus2 *statusChain=NULL) |
| virtual | ~tTIO () |
| tBusSpaceReference | getBusSpaceReference (void) const |
| void | setAddressOffset (u32 value, nMDBG::tStatus2 *statusChain=NULL) |
| u32 | getAddressOffset (nMDBG::tStatus2 *statusChain=NULL) |
| void | flushBus (nMDBG::tStatus2 *statusChain=NULL) |
Public Attributes | |
| tG0_AutoIncrement | G0_AutoIncrement |
| tG0_Command | G0_Command |
| tG0_Counting_Mode | G0_Counting_Mode |
| tG0_MSeries_Counting_Mode | G0_MSeries_Counting_Mode |
| tG0_DMA_Control | G0_DMA_Control |
| tG0_Input_Select | G0_Input_Select |
| tG0_Load_A | G0_Load_A |
| tG0_Load_B | G0_Load_B |
| tG0_Mode | G0_Mode |
| tG0_Second_Gate | G0_Second_Gate |
| tG0_MSeries_ABZ | G0_MSeries_ABZ |
| tG01_Joint_Reset | G01_Joint_Reset |
| tG1_AutoIncrement | G1_AutoIncrement |
| tG1_Command | G1_Command |
| tG1_Counting_Mode | G1_Counting_Mode |
| tG1_MSeries_Counting_Mode | G1_MSeries_Counting_Mode |
| tG1_DMA_Control | G1_DMA_Control |
| tG1_Input_Select | G1_Input_Select |
| tG1_Load_A | G1_Load_A |
| tG1_Load_B | G1_Load_B |
| tG1_Mode | G1_Mode |
| tG1_Second_Gate | G1_Second_Gate |
| tG1_MSeries_ABZ | G1_MSeries_ABZ |
| tInterrupt_G0_Ack | Interrupt_G0_Ack |
| tInterrupt_G0_Enable | Interrupt_G0_Enable |
| tInterrupt_G1_Ack | Interrupt_G1_Ack |
| tInterrupt_G1_Enable | Interrupt_G1_Enable |
| tG0_DMA_Status | G0_DMA_Status |
| tG0_HW_Save | G0_HW_Save |
| tG0_HW_Save_High | G0_HW_Save_High |
| tG0_HW_Save_Low | G0_HW_Save_Low |
| tG0_Save | G0_Save |
| tG0_Save_High | G0_Save_High |
| tG0_Save_Low | G0_Save_Low |
| tG0_Status_1 | G0_Status_1 |
| tG01_Joint_Status_1 | G01_Joint_Status_1 |
| tG01_Joint_Status_2 | G01_Joint_Status_2 |
| tG01_Status | G01_Status |
| tG1_DMA_Status | G1_DMA_Status |
| tG1_HW_Save | G1_HW_Save |
| tG1_HW_Save_High | G1_HW_Save_High |
| tG1_HW_Save_Low | G1_HW_Save_Low |
| tG1_Save | G1_Save |
| tG1_Save_High | G1_Save_High |
| tG1_Save_Low | G1_Save_Low |
| tG1_Status_1 | G1_Status_1 |
| enum tTIO::tId |
| tTIO::tTIO | ( | tBusSpaceReference | addrSpace, |
| nMDBG::tStatus2 * | statusChain = NULL |
||
| ) |
| void tTIO::flushBus | ( | nMDBG::tStatus2 * | statusChain = NULL | ) | [inline] |
Definition at line 66 of file tTIO_auto.cpp.
| u32 tTIO::getAddressOffset | ( | nMDBG::tStatus2 * | statusChain = NULL | ) | [inline] |
Definition at line 62 of file tTIO_auto.cpp.
| tBusSpaceReference tTIO::getBusSpaceReference | ( | void | ) | const [inline] |
Definition at line 53 of file tTIO_auto.cpp.
| void tTIO::reset | ( | nMDBG::tStatus2 * | statusChain = NULL | ) |
| void tTIO::setAddressOffset | ( | u32 | value, |
| nMDBG::tStatus2 * | statusChain = NULL |
||
| ) | [inline] |
Definition at line 58 of file tTIO_auto.cpp.
1.7.4 
